Intel 6 SERIES CHIPSET - DATASHEET 01-2011 Datasheet page 73

Signal Description
Table 2-19. Clock Interface Signals (Sheet 2 of 3)
Name
CLKOUT_PCIE[7:0]
CLKOUT_PCIE[7:0]
CLKIN_GND0_P,
CLKIN_GND0_N
(Desktop Only)
CLKIN_GND1_P,
CLKIN_GND1_N
PCIECLKRQ0# /
GPIO73,
PCIECLKRQ1# /
GPIO18,
PCIECLKRQ3# /
GPIO25,
PCIECLKRQ4# /
GPIO26
(all the above
CLKRQ# signals are
Mobile Only)
PCIECLKRQ2# /
GPIO20,
PCIECLKRQ5# /
GPIO44,
PCIECLKRQ6# /
GPIO45,
PCIECLKRQ7# /
GPIO46
CLKOUT_PCI[4:0]
CLKIN_PCILOOPBA
CLKOUTFLEX0
GPIO64
CLKOUTFLEX1
GPIO65
Datasheet
Type
_P, 100 MHz PCIe Gen2 specification differential output to PCI
O
Express devices
_N
Requires external pull-down termination (can be shared
I
between P and N signals of the differential pair).
Clock Request Signals for PCI Express 100 MHz Clocks
Can instead by used as GPIOs
I
NOTE: External pull-up resistor required if used for CLKREQ#
Clock Request Signals for PCI Express 100 MHz Clocks
Can instead by used as GPIOs
I
NOTE: External pull-up resistor required if used for CLKREQ#
Single-Ended, 33 MHz outputs to PCI connectors/devices. One
of these signals must be connected to CLKIN_PCILOOPBACK
O
to function as a PCI clock loopback. This allows skew control
for variable lengths of CLKOUT_PCI[4:0].
33 MHz PCI clock feedback input, to reduce skew between PCH
I on-die PCI clock and PCI clock observed by connected PCI
CK
devices
Configurable as a GPIO or as a programmable output clock
which can be configured as one of the following:
• 33 MHz
1
/
O
• 27 MHz (SSC/Non-SSC)
• 48/24 MHz
• 14.318 MHz
• DC Output logic '0'
Configurable as a GPIO or as a programmable output clock
which can be configured as one of the following:
• Non functional and unsupported clock output value (Default)
1
/
O
• 27 MHz (SSC/Non-SSC)
• 14.318 MHz output to SIO/EC
• 48/24 MHz
• DC Output logic '0'
Description
functionality
functionality
73