Rtc (Standard) Ram Bank - Intel 6 SERIES CHIPSET - DATASHEET 01-2011 Datasheet

LPC Interface Bridge Registers (D31:F0)
13.6.2 Indexed Registers
The RTC contains two sets of indexed registers that are accessed using the two
separate Index and Target registers (70/71h or 72/73h), as shown in
Table 13-7. RTC (Standard) RAM Bank
Index
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh–7Fh
Datasheet
Name
Seconds
Seconds Alarm
Minutes
Minutes Alarm
Hours
Hours Alarm
Day of Week
Day of Month
Month
Year
Register A
Register B
Register C
Register D
114 Bytes of User RAM
Table 13-7.
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