Intel 6 SERIES CHIPSET - DATASHEET 01-2011 Datasheet page 361

Chipset Configuration Registers
Table 10-1. Chipset Configuration Register Memory Map (Memory Space) (Sheet 3 of 4)
Offset
3314h–3317h
3318h–331Bh
3324h–3327h
332Ch–332Fh
3330h–3333h
3340h–3343h
3344h–3347h
3360h–3363h
3368h–336Bh
3378h–337Bh
337Ch–337Fh
3388h–338Bh
3390h–3393h
33A0h–33A3h
33B0h–33B3h
33C0h–33C3h
33CCh–33CFh
33D0h–33D3h
33D4h–33D7h
3400h–3403h
3404h–3407h
3410h–3413h
3414h–3414h
3418h–341Bh
341Ch–341Fh
3420h–3420h
3424h–3425h
3428h–342Bh
3590h–3594h
35A0h–35A3h
35A4h–35A7h
35B0h–35B3h
–
3A28 3A2Bh
–
3A2C 3A2Fh
–
3A6C 3A6Fh
Datasheet
Mnemonic
CIR7 Chipset Initialization Register 7
PM_CFG Power Management Configuration
CIR8 Chipset Initialization Register 8
DEEP_S4_POL Deep S4 Power Policies
DEEP_S5_POL Deep S5 Power Policies
CIR10 Chipset Initialization Register 10
CIR11 Chipset Initialization Register 11
CIR12 Chipset Initialization Register12
CIR14 Chipset Initialization Register 14
CIR15 Chipset Initialization Register 15
CIR13 Chipset Initialization Register 13
CIR16 Chipset Initialization Register 16
CIR18 Chipset Initialization Register 18
CIR17 Chipset Initialization Register 17
CIR23 Chipset Initialization Register 23
CIR19 Chipset Initialization Register 19
CIR20 Chipset Initialization Register 20
CIR21 Chipset Initialization Register 21
CIR22 Chipset Initialization Register 22
RC RTC Configuration
HPTC High Precision Timer Configuration
GCS General Control and Status
BUC Backed Up Control
FD Function Disable
CG Clock Gating
FDSW Function Disable SUS Well
Display Bus, Device and Function
DISPBDF
Initialization
FD2 Function Disable 2
MISCCTL Miscellaneous Control Register
USBOCM1 USB Overcurrent MAP Register 1
USBOCM2 USB Overcurrent MAP Register 2
USB Rate Matching Hub Wake
RMHWKCTL
Control
CIR24 Chipset Initialization Register 24
CIR25 Chipset Initialization Register 25
CIR26 Chipset Initialization Register 26
Register Name Default Type
00000000h R/W
00000000h R/W
00000000h R/W
00000000h R/W
00000000h R/W
00000000h R/W
00000000h R/W
00000000h R/W
00000000h R/W
00000000h R/W
00000000h R/W
00000000h R/W
00000000h R/W
00000000h R/W
00000000h R/W
00000000h R/W
00000000h R/W
00000000h R/W
00000000h R/W
R/W,
00000000h
R/WLO
00000000h R/W
R/W,
000000yy0h
R/WLO
00h R/W
00000000h R/W
00000000h R/W
00h R/W
0010h R/W
00000000h R/W
00000000h R/W
00000000h R/WO
00000000h R/WO
00000000h R/WO
00000000h R/W
00000000h R/W
00000000h R/W
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