Setup And Hold Times; Float Delay; Pulse Width; Valid Delay From Rising Clock Edge - Intel 6 SERIES CHIPSET - DATASHEET 01-2011 Datasheet

Figure 8-12. Valid Delay from Rising Clock Edge
Figure 8-13. Setup and Hold Times
Figure 8-14. Float Delay
Figure 8-15. Pulse Width
340
Clock 1.5V
Valid Delay
Output
Clock
Setup Time
Input VT
Input
Output
VT
VT
1.5V
Hold Time
VT
VT
Float
Delay

Pulse Width

VT
Electrical Characteristics
Datasheet