Event Input Signals And Their Usage; Pwrbtn# (Power Button); Deep S4/S5 Wake Events - Intel 6 SERIES CHIPSET - DATASHEET 01-2011 Datasheet

Hide thumbs Also See for 6 SERIES CHIPSET - DATASHEET 01-2011:
Table of Contents

Advertisement

The PCH also performs a SUSWARN#/SUSACK# handshake to ensure the platform is
ready to enter Deep S4/S5. The PCH asserts SUSWARN# as notification that it is about
to enter Deep S4/S5. Before the PCH proceeds and asserts SLP_SUS#, the PCH waits
for SUSACK# to assert.
5.13.7.6.2
Exit from Deep S4/S5
While in Deep S4/S5, the PCH monitors and responds to a limited set of wake events
(RTC Alarm, Power Button, and GPIO27). Upon sensing an enabled Deep S4/S5 wake
event, the PCH brings up the Suspend well by deasserting SLP_SUS#.
Table 5-33. Deep S4/S5 Wake Events
Power Button
Note that ACPRESENT has some behaviors that are different from the other Deep S4/
S5 wake events. If the Intel ME has enabled ACPRESENT as a wake event then it
behaves just like any other Intel ME Deep S4/S5 wake event. However, even if
ACPRESENT wakes are not enabled, if the Host policies indicate that Deep S4/S5 is only
supported when on battery, then ACPRESENT going high will cause the PCH to exit
Deep S4/S5. In this case, the Suspend wells gets powered up and the platform remains
in S4/MOFF or S5/MOFF. If ACPRESENT subsequently drops (before any Host or Intel
ME wake events are detected), the PCH will re-enter Deep S4/S5.
5.13.8

Event Input Signals and Their Usage

The PCH has various input signals that trigger specific events. This section describes
those signals and how they should be used.
5.13.8.1

PWRBTN# (Power Button)

The PCH PWRBTN# signal operates as a "Fixed Power Button" as described in the
Advanced Configuration and Power Interface, Version 2.0b. PWRBTN# signal has a
16 ms de-bounce on the input. The state transition descriptions are included in
Table
5-34. Note that the transitions start as soon as the PWRBTN# is pressed (but
after the debounce logic), and does not depend on when the Power Button is released.
Note:
During the time that the SLP_S4# signal is stretched for the minimum assertion width
(if enabled), the Power Button is not a wake event. Refer to the following Power Button
Override Function section for further details.
172
Event
RTC Alarm
RTC_DS_WAKE_DIS (RCBA+3318h:Bit 21)
GPIO27
Enable
Always enabled
GPIO27_EN (PMBASE+28h:Bit 35)
Functional Description
Datasheet

Hide quick links:

Advertisement

Table of Contents
loading

This manual is also suitable for:

6 series

Table of Contents