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®
Intel
6 Series Chipset
Specification Update
January 2011
®
Notice: Intel
6 Series Chipset may contain design defects or errors known as errata which may cause the
product to deviate from published specifications. Current characterized errata are documented in this
specification update.
Document Number:
324646-001
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Summary of Contents for Intel 6 SERIES CHIPSET - SPECIFICATION UPDATE 01-2011
- Page 1 6 Series Chipset Specification Update January 2011 ® Notice: Intel 6 Series Chipset may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are documented in this specification update.
- Page 2 Customers, licensees and other third parties are not authorized by Intel to use code names in advertising, promotion or marketing of any product or services and any such use of Intel's internal code names is at the sole risk of the user.
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Page 3: Table Of Contents
Contents Contents Preface ........................5 Summary Tables of Changes ..................6 Identification Information ..................8 PCH Device and Revision Identification ..............9 Errata ........................12 Specification Changes....................17 Specification Clarification ..................18 Documentation Changes ..................19 § Specification Update... - Page 4 Revision History Revision History Revision Description Date • Initial Release January 2011 § § Specification Update...
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Page 5: Preface
Affected Documents/Related Documents Document Title Number ® Intel 6 Series Chipset Datasheet 324645-001 Nomenclature Errata are design defects or errors. Errata may cause the behavior of the PCH to deviate from published specifications. Hardware and software designed to be used with any given stepping must assume that all errata documented for that stepping are present in all devices. -
Page 6: Summary Tables Of Changes
Summary Tables of Changes The following tables indicate the errata, specification changes, specification clarifications, or documentation changes which apply to the PCH product. Intel may fix some of the errata in a future stepping of the component, and account for the other outstanding issues through documentation or specification changes as noted. - Page 7 Summary Tables of Changes Errata Stepping Erratum Status ERRATA Number No Fix USB Isoch In Transfer Error Issue No Fix USB Full-Speed / Low-Speed Device Removal Issue No Fix USB Babble Detected with SW Overscheduling No Fix USB Low-Speed/Full-Speed EOP Issue No Fix USB PLL Control FSM Not Getting Reset on Global Reset No Fix...
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Page 8: Identification Information
Identification Information Identification Information Markings S-Spec Top Marking Notes Stepping ® SLH82 BD82H67 Intel H67 Chipset ® SLH84 BD82P67 Intel P67 Chipset ® SLH9C BD82HM67 Intel HM67 Chipset ® SLH9D BD82HM65 Intel HM65 Chipset Specification Update... -
Page 9: Pch Device And Revision Identification
PCI device and function. The assigned value is based on the product’s stepping. PCH Device and Revision ID Table (Sheet 1 of 3) Device Description Dev ID Comments Function Rev ID ® 1C4Ah Intel H67 Chipset ® 1C46h Intel P67 Chipset D31:F0 ® 1C4Bh Intel HM67 Chipset ®... - Page 10 PCH Device and Revision Identification PCH Device and Revision ID Table (Sheet 2 of 3) Device Description Dev ID Comments Function Rev ID Desktop and Mobile (When D28:F0/F1/F2/F3/F4/F5/ 1C10h F6/F7:ECh:bit 1= 0) PCI Express* Desktop (When D28:F0/F1/F2/F3/F4/F5/ F6/F7:ECh:bit D28:F0 244Eh Port 1 1 = 1) Mobile (When D28:F0/F1/F2/F3/F4/F5/ F6/F7:ECh:bit 1...
- Page 11 LAN Device ID is loaded from EEPROM. If EEPROM contains either 0000h or FFFFh in the Device ID ® GbE physical layer Transceiver (PHY) location, then 1C33h is used. Refer to the appropriate Intel datasheet for LAN Device IDs. This table shows the default PCI Express Function Number-to-Root Port mapping. Function numbers for a given root port are assignable through the “Root Port Function Number and Hide for PCI Express Root...
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Page 12: Errata
If a single data pack et is lost no perce ptible impact for the end user is expected. Note: Intel has only observed the issue in a synthetic test environment where precise control of packet scheduling is available, and has not observed this failure in its compatibility validation testing. - Page 13 The loss of a single isochronous transaction may not result in end user perceptible impact. Note: Intel has only observed this failure when using software that does not comply with the USB specification and violates the hardware isochronous scheduling threshold by terminating transactions that are already in progress Workaround: None.
- Page 14 Errata Asynchronous Retries Prioritized Over Periodic Transfers Problem: The integr ated USB incorrectly prioritizes Full-Sp eed and Low-Speed asynchronous retries over dispatchable periodic transfers. Implication: Periodic transfers may be delayed or aborted. If the asynchronous retry latency causes the periodi c transfer to be aborted, the impact v aries depending on the nature of periodic transfer: •...
- Page 15 Intel 6 Series Chipsets. Implication: No functional or visual failures have been observed by Intel. HDMI electrical compliance failures may be seen at 222 MHz Deep Color Mode. This issue doe s not prevent HDMI with Deep Color Logo certification as no failures have been seen with 74 .25 MHz Deep...
- Page 16 Errata USB V Maximum Violation HSOH Problem: Intel 6 Series Chipset High- Speed USB 2.0 V ma y ex ceed the USB 2. HSOH specification. • The maximum expected V is 440 mV. HSOH Implication: There are no known functional failures.
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Page 17: Specification Changes
Specification Changes Specification Changes There are no specificaiton changes in this revision of the specification update. Specification Update... -
Page 18: Specification Clarification
Specification Clarification Specification Clarification There are no specification clarifications in this revision of the specification update. Specification Update... -
Page 19: Documentation Changes
Documentation Changes Documentation Changes There are no documentation changes in this revision of the specification update. Specification Update... - Page 20 Documentation Changes Specification Update...