Completion With Unsuccessful Completion Status; Ethernet Interface; Pci Power Management; 82579 Lan Phy Interface - Intel 6 SERIES CHIPSET - DATASHEET 01-2011 Datasheet

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Functional Description
5.3.2.2

Completion with Unsuccessful Completion Status

A completion with unsuccessful completion status (any status other than 000) is
dropped and not processed by the integrated GbE controller. Furthermore, the request
that corresponds to the unsuccessful completion is not retried. When this unsuccessful
completion status is received, the System Error bit in the PCI configuration space is set.
If the system errors are enabled in configuration space, a system error is indicated on
the PCI host bus.
5.3.3

Ethernet Interface

The integrated GbE controller provides a complete CSMA/CD function supporting IEEE
802.3 (10 Mb/s), 802.3u (100 Mb/s) implementations. It also supports the IEEE 802.3z
and 802.3ab (1000 Mb/s) implementations. The device performs all of the functions
required for transmission, reception, and collision handling called out in the standards.
The mode used to communicate between the PCH and the 82579 PHY supports 10/100/
1000 Mb/s operation, with both half- and full-duplex operation at 10/100 Mb/s, and
full-duplex operation at 1000 Mb/s.
5.3.3.1

82579 LAN PHY Interface

The integrated GbE controller and the 82579 PHY communicate through the PCIe and
SMBus interfaces. All integrated GbE controller configuration is performed using device
control registers mapped into system memory or I/O space. The 82579 device is
configured using the PCI Express or SMBus interface.
The integrated GbE controller supports various modes as listed in
Table 5-6.

LAN Mode Support

Normal 10/100/1000 Mb/s
Manageability and Remote Wake-up
NOTES:
1. GbE operation is not supported in Sx states.
5.3.4

PCI Power Management

The integrated GbE controller supports the Advanced Configuration and Power Interface
(ACPI) specification as well as Advanced Power Management (APM). This enables the
network-related activity (using an internal host wake signal) to wake up the host. For
example, from Sx (S3–S5) to S0.
The integrated GbE controller contains power management registers for PCI and
supports D0 and D3 states. PCIe transactions are only allowed in the D0 state, except
for host accesses to the integrated GbE controller's PCI configuration registers.
Datasheet
Mode
System State
Interface Active
PCI Express or
S0
1
SMBus
Sx
SMBus
Table
5-6.
Connections
82579
82579
125

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