Intel 6 SERIES CHIPSET - DATASHEET 01-2011 Datasheet page 890

23.3.4 ME CSR_HA—ME Control Status Host Access
(MEI MMIO Register)
Address Offset: MEI0_MBAR + 0Ch
Default Value:
Bit
ME Circular Buffer Depth Host Read Access (ME_CBD_HRA).
31:24
Host read only access to ME_CBD.
ME CB Write Pointer Host Read Access (ME_CBWP_HRA).
23:16
Host read only access to ME_CBWP.
ME CB Read Pointer Host Read Access (ME_CBRP_HRA).
15:8
Host read only access to ME_CBRP.
7:5 Reserved
ME Reset Host Read Access (ME_RST_HRA).
4
Host read access to ME_RST.
ME Ready Host Read Access (ME_RDY_HRA):
3
Host read access to ME_RDY.
ME Interrupt Generate Host Read Access (ME_IG_HRA).
2
Host read only access to ME_IG.
ME Interrupt Status Host Read Access (ME_IS_HRA).
1
Host read only access to ME_IS.
ME Interrupt Enable Host Read Access (ME_IE_HRA).
0
Host read only access to ME_IE.
890
Intel® Management Engine Interface (MEI) Subsystem Registers (D22:F0)
02000000h
Attribute: RO
Size: 32 bits
Description
Datasheet