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®
2nd Generation Intel
Core™
Processor Family with
®
Intel
6 Series Chipset
Development Kit
User Guide
March 2011
Document Number: 325208

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Summary of Contents for Intel 6 Series

  • Page 1 ® 2nd Generation Intel Core™ Processor Family with ® Intel 6 Series Chipset Development Kit User Guide March 2011 Document Number: 325208...
  • Page 2 Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order. Copies of documents which have an order number and are referenced in this document, or other Intel literature may be obtained by calling 1-800-548-4725 or by visiting Intel's website at http://www.intel.com.
  • Page 3: Table Of Contents

    Processor Thermals ................... 29 3.1.8 Processor Active Cooling ................29 PCH Support ......................29 ® 3.2.1 Introduction to the Intel 6 Series Chipset ........... 29 3.2.2 Key Power Management Signals ..............29 3.2.3 PCIe* Support ..................30 3.2.4 On-Board LAN ................... 32 3.2.5...
  • Page 4 Figure 13. Development Board Components - Bottom View ........50 Figure 14. Back Panel Connectors ................ 51 Figure 15. Jumpers for Programming SPI and H8 ..........58 Generation Intel ® Core™ Processor with Intel ® 6 Series Chipset Development Kit User Guide March 2011 Document Number: 325208-001...
  • Page 5 Table 8. PCIe* Ports................... 30 Table 9. Reworks for Different Port Mappings ............32 ® Table 10. Selection of I/O Voltage for the Intel High Definition Audio ..... 33 Table 11. SATA Ports..................34 Table 12. USB Port Mapping ................39 Table 13.
  • Page 6 About This Document Revision History Document Revision Description Revision Date Number Number 325208 Initial release. March 2011 Generation Intel ® Core™ Processor with Intel ® 6 Series Chipset Development Kit User Guide March 2011 Document Number: 325208-001...
  • Page 7: About This Document

    Core™ Processor Family with ® Intel 6 Series Chipset Development Kit. The document has been written for OEMs, system evaluators, and embedded system developers, and assumes basic familiarity in the fundamental concepts involved with installing and configuring hardware for a personal computer system.
  • Page 8 A pound symbol (#) appended to a signal name identifies an active-low signal. Port pins are represented by the port abbreviation, a period, and the pin number (e.g., P1.0). Generation Intel ® Core™ Processor with Intel ® 6 Series Chipset Development Kit User Guide March 2011 Document Number: 325208-001...
  • Page 9: Glossary Of Terms And Acronyms

    Minimum flight time is the smallest acceptable flight time a network will experience under all conditions. Gen 2 PCI Express Generation 2 ® ® Generation Intel Core™ Processor with Intel 6 Series Chipset Development Kit March 2011 User Guide Document Number: 325208-001...
  • Page 10 System timing budgets should include margin for SSO effects. Generation Intel ® Core™ Processor with Intel ® 6 Series Chipset Development Kit User Guide March 2011 Document Number: 325208-001...
  • Page 11: Table 3. Acronyms

    Spread Spectrum Differential Clock Common Mode Choke CMOS Complementary Metal-Oxide-Semiconductor Central Processing Unit (processor) Digital Display Interface Double Data Rate ® ® Generation Intel Core™ Processor with Intel 6 Series Chipset Development Kit March 2011 User Guide Document Number: 325208-001...
  • Page 12 ® ® Intel Intel High Definition Audio HDMI High Definition Media Interface Hot Plug Detect High Speed. Refers to USB Generation Intel ® Core™ Processor with Intel ® 6 Series Chipset Development Kit User Guide March 2011 Document Number: 325208-001...
  • Page 13 Platform Environment Control Interface PCI Express* Graphics Pin Grid Array Platform LAN Connect Phase Locked Loop POST Power On Self Test ® ® Generation Intel Core™ Processor with Intel 6 Series Chipset Development Kit March 2011 User Guide Document Number: 325208-001...
  • Page 14: Related Documents And Information

    Voltage Regulator eXtended Debug Port Related Documents and Information Table 4 provides a summary of available Intel classified documents and information related to this development kit. To obtain, please contact your Intel representative. Generation Intel ® Core™ Processor with Intel ®...
  • Page 15: Development Kit Technical Support

    Intel 6 Series Chipset and Intel C200 Series Chipset External Design 443554 Specification (EDS) Note: The items listed in the above table are Intel classified; please contact your Intel representative. Development Kit Technical Support 1.5.1 Online Support Intel’s web site (http://www.intel.com/) provides up-to-date technical information and product support.
  • Page 16: Getting Started

    Processor thermal solution and CPU back plate ® Intel 6 Series Chipset (installed) • ® Intel 6 Series Chipset heatsink (installed) • One type 2032, 3V lithium coin cell battery (installed) • One 1GB DDR3 SO-DIMM • One power supply •...
  • Page 17: Additional Required Software Not Included In This Kit

    Add-In Cards: The following add-in cards are mentioned throughout this • document and are used to enable different features on the board. They are not provided with the board. Please contact your Intel representative for more information on the functionality and availability of these cards. Eaglemont card...
  • Page 18: Workspace Preparation

    Core™ i7-2710QE processor in socket U3E1 and lock in place. Make sure to align the chip to the pin 1 marking. The kit includes a second ® CPU for evaluation — the dual-core Intel Core™ i5-2510E processor. Install the MPI socket and place the chipset at U7F1 •...
  • Page 19: System Power-Up

    2. As the system boots, press F2 to enter the BIOS setup screen. 3. Check time, date, and configuration settings. The default settings should be ® sufficient for most users with the exception of Intel SpeedStep Technology. This feature is disabled by default and can be enabled in setup.
  • Page 20: Configuring The Bios

    Power On Self Test (POST). Press the F2 key or Delete during POST to enter the BIOS interface. For AMI BIOS POST codes, visit: http://www.ami.com. For BIOS updates, please contact your Intel representative or visit http://edc.intel.com/Platforms/Core-QM67-HM65/#sdrvutil. 2.8.2...
  • Page 21 BIOS menu and continue booting into the operating system. The system is now ready for normal operation. ® ® Generation Intel Core™ Processor with Intel 6 Series Chipset Development Kit March 2011 User Guide Document Number: 325208-001...
  • Page 22: Development Kit Features

    ® Interface (Intel FDI); max supported speed is 2.7GT/s ® Intel 6 Series Chipset 989-pin FCBGA footprint The development board supports Memory 2x DDR3 SO-DIMM slots DDR3 frequency of up to 1333 MHz. Can be supported as: 1x16 PEG External 1x PCIe x16 graphics slot through x16 PEG slot on board.
  • Page 23 J8C2. Requires ADD2N add-in card. On-board right-angled CRT Video connector Not supported by the Intel 6 Series No slots on-board chipset. PCIe Gen 2.0 Compliance, 5 GT/s speed; four ports to x1 PCIe slots; one port to x4 slot, one lane to 8x PCIe x1 lanes from the Intel 6 ®...
  • Page 24: Processor Support

    The processor features a monolithic die with integrated memory and graphics controller. ® Note: Socket G2 -- Socket 988B specifically meant for 2nd Generation Intel Core™ processor family. It has pins A1, B1 de-populated compared to rPGA 989. Generation Intel ®...
  • Page 25: Clock Requirements

    Development Kit Features 3.1.1 Clock Requirements The processor requires two external clock inputs: 100 MHz BCLK given as reference clock input to Core, DMI, Intel FDI, PEG and • DDR PLLs. • 120 MHz DP_CLK given as reference CLK input for the Display port PLL Note: To achieve a 100 MHz BCLK, ensure the J6G1 jumper on-board is unstuffed (1-X).
  • Page 26: Memory Support

    DDR3 module with inbuilt thermal sensor can be supported. There is also an on- board a thermal sensor (U2W2) closer to the SODIMMs. Generation Intel ® Core™ Processor with Intel ® 6 Series Chipset Development Kit User Guide March 2011 Document Number: 325208-001...
  • Page 27: Graphics Support

    Jumper setting change is required to enable eDP panel only. Pull-down CFG4 strap by shorting the jumper J1E1. Strap definition is provided in the following table. ® ® Generation Intel Core™ Processor with Intel 6 Series Chipset Development Kit March 2011 User Guide Document Number: 325208-001...
  • Page 28: External Graphics Support

    PCH. DMI is the key interface between the ® processor and the Intel 6 Series Chipset. Apart from this, it is also used to transfer information such as ME data, and power-management signals such as SLP#, DPRSLP#, DPRSLPVR#, STP_CLK#. All the power-management handshakes happen across this interface.
  • Page 29: Processor Thermals

    Introduction to the Intel 6 Series Chipset The Intel 6 Series chipset is the next-generation platform controller hub (PCH). The major differences between the Intel Q5 Series and the Intel 6 Series chipset PCH include: • DMI Gen 2 (5 GT/s) •...
  • Page 30: Pcie* Support

    3.2.3 PCIe* Support The development board supports six on-board PCIe (5x1 and 1x4) slots. The Intel 6 Series chipset has a total of eight Gen 2 PCIe ports. By default, four of those IO ports have been routed to x1 connectors, one to a x4 connector, one to LAN, one to Display Mini PCIe connector, and one to docking.
  • Page 31: Figure 3. Pcie* Port Mapping - Schematic Snapshot

    Development Kit Features Figure 3. PCIe* Port Mapping – Schematic Snapshot ® ® Generation Intel Core™ Processor with Intel 6 Series Chipset Development Kit March 2011 User Guide Document Number: 325208-001...
  • Page 32: On-Board Lan

    On-Board LAN The development board supports 10/100/1000 Mbps Ethernet through the on-board Intel 82579LM Gigabit Ethernet PHY (EU7M1). The LAN PHY has PCIe and SMBus connections to the PCH. It is routed to Dock via the Docking Switch. Data transfer occurs over PCIe lanes.
  • Page 33: Soft Audio And Modem

    0 and 1 are connected to the card. An on-board header is provided at J9E6 and J9E8 for this purpose. No direct connection is provided for the Intel HD Audio Card on the development board; the Mott Canyon 4 card is required to enable the Intel HD Audio functionality.
  • Page 34: Sata Storage

    3.2.6 SATA Storage The Intel 6 Series chipset has six SATA ports, out of which two ports, ports 0 and 1, support speeds up to 6 Gbps. SATA port 0 is connected to J8J1 (direct connect), port 1 is connected to J7J1 (cable connect) with power connector at J6H1. Port 2 is connected to SATA ODD connector J9E7.
  • Page 35: Figure 5. Back Panel Connectors

    Figure 5. Back Panel Connectors Embedded Display Port (eDP) Port D on the Intel 6 Series chipset can be configured as eDP port. By default, eDP from the processor is used, but optional support is provided for eDP from the PCH as well.
  • Page 36: Dp/Hdmi Support

    2. STUFF R5A3, R5A4, R5A5, R5A6, R5B1, R5B2, R5B3, R5B4, R3M6, R2N4, R2A3, R3M2, R3A11 (with 0-Ohms) For HPD: 1. UNSTUFF R4A2 and STUFF R4A1 with 0 Ohms Generation Intel ® Core™ Processor with Intel ® 6 Series Chipset Development Kit User Guide March 2011 Document Number: 325208-001...
  • Page 37: Dmc Support

    This feature is supported on the 2nd Generation Intel Core™ processor family and ® Intel 6 Series Chipset development board via the Elk Creek-4 add-in card (on PEG slot). To enable switchable graphics, the J9F4 setting needs to be changed to (2-3). No board reworks are required.
  • Page 38: Usb Connectors

    Two more USB ports (8 and 9) are routed to RJ45 plus Dual USB Connector (J4A1) on the back of the chassis. Generation Intel ® Core™ Processor with Intel ® 6 Series Chipset Development Kit User Guide March 2011 Document Number: 325208-001...
  • Page 39: Table 12. Usb Port Mapping

    J7H2 (2x5 Connector) Port 13 FPIO J7H2 (2x5 Connector) The table below indicates the OC mapping for all the USB2.0 ports. ® ® Generation Intel Core™ Processor with Intel 6 Series Chipset Development Kit March 2011 User Guide Document Number: 325208-001...
  • Page 40: Lpc Super I/O (Sio)/Lpc Slot

    1 and 2 of connector J9F2 and external EC has to handle board power sequencing and thermal management. Generation Intel ® Core™ Processor with Intel ® 6 Series Chipset Development Kit User Guide March 2011 Document Number: 325208-001...
  • Page 41: Spi

    BIOS_SEL2 =1 Table 15 shows the different images corresponding to the settings of BIOS_SEL2, BIOS_SEL1, BIOS_SEL0, and the corresponding LEDs. ® ® Generation Intel Core™ Processor with Intel 6 Series Chipset Development Kit March 2011 User Guide Document Number: 325208-001...
  • Page 42: Clocks

    Fully integrated clocking mode: For FCIM, the CK505 can be unstuffed and PCH provides all clocks. A general block diagram is shown in Figure Generation Intel ® Core™ Processor with Intel ® 6 Series Chipset Development Kit User Guide March 2011 Document Number: 325208-001...
  • Page 43: Cpu_Itp Clock And Xdp Clock

    The following figures and tables present the various options. Figure 10. Block Diagram of GDXC and XDP Clock on the Development Board ® ® Generation Intel Core™ Processor with Intel 6 Series Chipset Development Kit March 2011 User Guide Document Number: 325208-001...
  • Page 44: Real Time Clock

    An on-board battery at BT5G1 maintains power to the real time clock (RTC) when in a mechanical off state. A CR2032 battery is installed on the board. Generation Intel ® Core™ Processor with Intel ® 6 Series Chipset Development Kit User Guide March 2011 Document Number: 325208-001...
  • Page 45: Debug Interfaces

    Mobile. The Desktop solution consists of only using the ATX power supply. The Mobile solution consists of using the Intel Adaptive Mobile Power Systems AC brick in conjunction with the batteries. When the Mobile solution is being used either AC brick or batteries can be plugged in.
  • Page 46: Power Supply Usage And Recommendation

    Hanging during boot with PEG or PCI graphics • PCI video only during boot, but not available afterwards in Windows Generation Intel ® Core™ Processor with Intel ® 6 Series Chipset Development Kit User Guide March 2011 Document Number: 325208-001...
  • Page 47: Power Management

    Suspend To RAM (all switched rails are turned off) G1/S4 Suspend To Disk G2/S5 Soft Off Deep Sleep † Mechanical Off ® ® Generation Intel Core™ Processor with Intel 6 Series Chipset Development Kit March 2011 User Guide Document Number: 325208-001...
  • Page 48: Development Board Summary

    The following figures show the major components of the development board, and Table 17 gives a brief description of each component. Figure 12. Development Board Components – Top View Generation Intel ® Core™ Processor with Intel ® 6 Series Chipset Development Kit User Guide March 2011 Document Number: 325208-001...
  • Page 49: Table 17. Development Board Components List - Top View

    USB2.0 FPIO headers J7H5, J7H6, J7H2, J8H2 SATA cable connect (port1) J7G1 ATX Power J5H2 RTC battery BT5G1 eDP connector J4E1 ® ® Generation Intel Core™ Processor with Intel 6 Series Chipset Development Kit March 2011 User Guide Document Number: 325208-001...
  • Page 50: Figure 13. Development Board Components - Bottom View

    Display Mini PCIe connector J7M1 DDR Channel A J4U1 DDR Channel B J4V1 C Hub U1W1 DDR3 VR EU3W1 CK505 EU6V1 Generation Intel ® Core™ Processor with Intel ® 6 Series Chipset Development Kit User Guide March 2011 Document Number: 325208-001...
  • Page 51: Connectors

    J4A1 Dual-stack USB2.0 J3A2 HDMI connector J3A1 Reserved (NO-STUFF by default) CRT RS-232 J1A2 PS/2 - Mouse on Top J1A1 ® ® Generation Intel Core™ Processor with Intel 6 Series Chipset Development Kit March 2011 User Guide Document Number: 325208-001...
  • Page 52: Configuration Settings

    SPI PROGRAMMING J8C5 (1-X) SPI PROGRAMMING J8D1 All Open SPI PROGRAMMING J6G1 (1-X) BCLK FREQUENCY SELECTION J8C3 (1-2) SIO RESET Generation Intel ® Core™ Processor with Intel ® 6 Series Chipset Development Kit User Guide March 2011 Document Number: 325208-001...
  • Page 53: Power On And Reset Button

    POWER button is located at SW1E1 (see #1 in table below) and the RESET button is located at SW1E2 (see #2 in table below). ® ® Generation Intel Core™ Processor with Intel 6 Series Chipset Development Kit March 2011 User Guide Document Number: 325208-001...
  • Page 54: Leds

    System in M0/M3 CR5H6 MPC ON/OFF INDICATOR LED CR6D1 SATA ACTIVITY CR7G2 NUM_LOCK CR9G1 CAPS_LOCK CR9G2 SCROLL_LOCK CR9G3 BIOS_SEL0 CR9E1 BIOS_SEL1 CR9E2 Generation Intel ® Core™ Processor with Intel ® 6 Series Chipset Development Kit User Guide March 2011 Document Number: 325208-001...
  • Page 55 Development Board Summary Page# on the Reference Function Schematics for Designator reference BIOS_SEL2 CR9E3 ® ® Generation Intel Core™ Processor with Intel 6 Series Chipset Development Kit March 2011 User Guide Document Number: 325208-001...
  • Page 56: Quick Start

    Please refer to Table 20 for a summary of these jumpers. Generation Intel ® Core™ Processor with Intel ® 6 Series Chipset Development Kit User Guide March 2011 Document Number: 325208-001...
  • Page 57: Key Jumpers

    Jumper ID # J9G1 J8C6 J8C7 Key Jumpers The jumpers used for programming SPI and H8 are indicated in Figure ® ® Generation Intel Core™ Processor with Intel 6 Series Chipset Development Kit March 2011 User Guide Document Number: 325208-001...
  • Page 58: Figure 15. Jumpers For Programming Spi And H8

    PCIe SLOT 3 POWER CONTROL (2-3) J9H3 SATA DEVICE STATUS (PORT 4) (1-2) J9H5 SATA DEVICE STATUS (PORT 0) (1-2) Generation Intel ® Core™ Processor with Intel ® 6 Series Chipset Development Kit User Guide March 2011 Document Number: 325208-001...
  • Page 59 NOTE: Ensure proper jumper settings before powering-up the board. Please refer to Table 20 for a complete list of jumper settings. § ® ® Generation Intel Core™ Processor with Intel 6 Series Chipset Development Kit March 2011 User Guide Document Number: 325208-001...

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