Slave Read Of Rtc Time Bytes - Intel 6 SERIES CHIPSET - DATASHEET 01-2011 Datasheet

Table 5-51. Data Values for Slave Read Registers (Sheet 2 of 2)
Register
6
7
8
9
A
B
C
D
E
F
10h–FFh
5.20.7.2.1 Behavioral Notes
According to SMBus protocol, Read and Write messages always begin with a Start bit –
Address– Write bit sequence. When the PCH detects that the address matches the
value in the Receive Slave Address register, it will assume that the protocol is always
followed and ignore the Write bit (Bit 9) and signal an Acknowledge during bit 10. In
other words, if a Start –Address–Read occurs (which is illegal for SMBus Read or Write
protocol), and the address matches the PCH's Slave Address, the PCH will still grab the
cycle.
Also according to SMBus protocol, a Read cycle contains a Repeated Start–Address–
Read sequence beginning at Bit 20. Once again, if the Address matches the PCH's
Receive Slave Address, it will assume that the protocol is followed, ignore bit 28, and
proceed with the Slave Read cycle.
Note: An external microcontroller must not attempt to access the PCH's SMBus Slave logic
until at least 1 second after both RTCRST# and RSMRST# are deasserted (high).
5.20.7.3

Slave Read of RTC Time Bytes

The PCH SMBus slave interface allows external SMBus master to read the internal RTC's
time byte registers.
The RTC time bytes are internally latched by the PCH's hardware whenever RTC time is
not changing and SMBus is idle. This ensures that the time byte delivered to the slave
read is always valid and it does not change when the read is still in progress on the bus.
The RTC time will change whenever hardware update is in progress, or there is a
software write to the RTC time bytes.
The PCH SMBus slave interface only supports Byte Read operation. The external SMBus
master will read the RTC time bytes one after another. It is software's responsibility to
check and manage the possible time rollover when subsequent time bytes are read.
226
Bits
Contents of the Message 1 register. Refer to
7:0
description of this register.
Contents of the Message 2 register. Refer to
7:0
description of this register.
Contents of the TCO_WDCNT register. Refer to
7:0
description of this register.
7:0 Seconds of the RTC
7:0 Minutes of the RTC
7:0 Hours of the RTC
7:0 "Day of Week" of the RTC
7:0 "Day of Month" of the RTC
7:0 Month of the RTC
7:0 Year of the RTC
7:0 Reserved
Functional Description
Description
Section 13.9.8
Section 13.9.8
Section 13.9.9
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