Intel 6 SERIES CHIPSET - DATASHEET 01-2011 Datasheet page 654

16.1.27 LEG_EXT_CAP—USB EHCI Legacy Support Extended
Capability Register (USB EHCI—D29:F0, D26:F0)
Address Offset:
Default Value:
Power Well:
Function Level Reset: No
Note: These bits are not reset by a D3-to-D0 warm rest or a core well reset.
Bit
31:25 Reserved — RO. Hardwired to 00h
HC OS Owned Semaphore — R/W. System software sets this bit to request ownership
24 of the EHCI controller. Ownership is obtained when this bit reads as 1 and the HC BIOS
Owned Semaphore bit reads as clear.
23:17 Reserved — RO. Hardwired to 00h
HC BIOS Owned Semaphore — R/W. The BIOS sets this bit to establish ownership of
16 the EHCI controller. System BIOS will clear this bit in response to a request for
ownership of the EHCI controller by system software.
Next EHCI Capability Pointer — RO. Hardwired to 00h to indicate that there are no
15:8
EHCI Extended Capability structures in this device.
Capability ID — RO. Hardwired to 01h to indicate that this EHCI Extended Capability is
7:0
the Legacy Support Capability.
654
68 6Bh
–
00000001h
Suspend
EHCI Controller Registers (D29:F0, D26:F0)
Attribute: R/W, RO
Size: 32 bits
Description
Datasheet