Intel 6 SERIES CHIPSET - DATASHEET 01-2011 Datasheet page 442

12.1.21 PMCS—PCI Power Management Control and Status
Register (Gigabit LAN—D25:F0)
Address Offset: CCh
Default Value:
Function Level Reset: No (Bit 8 only)
Bit
PME Status (PMES) — R/WC. This bit is set to 1 when the function detects a wake-up
15
event independent of the state of the PMEE bit. Writing a 1 will clear this bit.
Data Scale (DSC) — R/W. This field indicates the scaling factor to be used when
interpreting the value of the Data register.
For the GbE LAN and common functions this field equals 01b (indicating 0.1 watt units)
if the PM is enabled in the NVM, and the Data_Select field is set to 0, 3, 4, 7, (or 8 for
14:13
Function 0). Else it equals 00b.
For the manageability functions this field equals 10b (indicating 0.01 watt units) if the
PM is enabled in the NVM, and the Data_Select field is set to 0, 3, 4, 7. Else it equals
00b.
Data Select (DSL) — R/W. This four-bit field is used to select which data is to be
reported through the Data register (offset CFh) and Data_Scale field. These bits are
writeable only when the Power Management is enabled using NVM.
0h = D0 Power Consumption
3h = D3 Power Consumption
12:9
4h = D0 Power Dissipation
7h = D3 Power Dissipation
8h = Common Power
All other values are reserved.
PME Enable (PMEE) — R/W. If Power Management is enabled in the NVM, writing a 1
to this register will enable Wakeup. If Power Management is disabled in the NVM,
8
writing a 1 to this bit has no affect, and will not set the bit to 1. This bit is not reset by
Function Level Reset.
7:4 Reserved – Returns a value of 0000.
No Soft Reset (NSR) — RO. Defines if the device executed internal reset on the
3
transition to D0. the LAN controller always reports 0 in this field.
2 Reserved – Returns a value of 0b.
Power State (PS) — R/W. This field is used both to determine the current power state
of the GbE LAN Controller and to set a new power state. The values are:
00 = D0 state (default)
1:0 01 = Ignored
10 = Ignored
11 = D3 state (Power Management must be enables in the NVM or this cycle will be
442
CDh
–
See bit description
ignored).
Gigabit LAN Configuration Registers
Attribute: R/WC, R/W, RO
Size: 16 bits
Description
Datasheet