Intel 6 SERIES CHIPSET - DATASHEET 01-2011 Datasheet page 827

Serial Peripheral Interface (SPI)
21.1.25 FDOD—Flash Descriptor Observability Data Register
(SPI Memory Mapped Configuration Registers)
Memory Address:
Default Value:
Note: This register that can be used to observe the contents of the Flash Descriptor that is
stored in the PCH Flash Controller.
Bit
Flash Descriptor Section Data (FDSD) — RO. Returns the DW of data to observe as
31:0
selected in the Flash Descriptor Observability Control.
21.1.26 AFC—Additional Flash Control Register
(SPI Memory Mapped Configuration Registers)
Memory Address:SPIBAR + C0hAttribute:
Default Value:
Bit
31:3 Reserved.
Flash Controller Interface Dynamic Clock Gating Enable — R/W.
0 = Flash Controller Interface Dynamic Clock Gating is Disabled
2:1
1 = Flash Controller Interface Dynamic Clock Gating is Enabled
Other configurations are Reserved.
Flash Controller Core Dynamic Clock Gating Enable — R/W.
0
0 = Flash Controller Core Dynamic Clock Gating is Disabled
1 = Flash Controller Core Dynamic Clock Gating is Enabled
21.1.27 LVSCC— Host Lower Vendor Specific Component
Capabilities Register
(SPI Memory Mapped Configuration Registers)
Memory Address:
Default Value:
Note: All attributes described in LVSCC must apply to all flash space below the FPBA, even if
it spans between two separate flash parts. This register is only applicable when SPI
device is in descriptor mode.
Bit
31:24 Reserved.
Vendor Component Lock (LVCL) — R/W. This register locks itself when set.
0 = The lock bit is not set
23
1 = The Vendor Component Lock bit is set.
NOTE: This bit applies to both UVSCC and LVSCC registers.
22:16 Reserved
Lower Erase Opcode (LEO)— R/W. This register is programmed with the Flash erase
instruction opcode required by the vendor's Flash component.
15:8
This register is locked by the Vendor Component Lock (LVCL) bit.
7:5 Reserved
Datasheet
SPIBAR + B4h
00000000h
00000000hSize:
SPIBAR + C4h
00000000h
Attribute: RO
Size: 32 bits
Description
RO, R/W
32 bits.
Description
Attribute: RO, R/WL
Size: 32 bits
Description
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