Intel 6 SERIES CHIPSET - DATASHEET 01-2011 Datasheet page 398

10.1.63 CIR17—Chipset Initialization Register 17
Offset Address: 33A0–33A3h
Default Value:
Bit
31:0
10.1.64 CIR23—Chipset Initialization Register 23
Offset Address: 33B0–33B3h
Default Value:
Bit
31:0
10.1.65 CIR19—Chipset Initialization Register 19
Offset Address: 33C0–33C3h
Default Value:
Bit
31:0
10.1.66 PMSYNC Configuration
Offset Address: 33C8–33CBh
Default Value:
Bit
31:12
11
10
9
8
7:0
398
00000000h
CIR17 Field 1 — R/W. BIOS must program this field to 00000800h.
00000000h
CIR23 Field 1 — R/W. BIOS must program this field to 00001000h.
00000000h
CIR19 Field 1 — R/W. BIOS must program this field to 00093900h.
00000000h
Reserved
GPIO_D Pin Selection (GPIO_D_SEL) — R/W. There are two possible GPIOs that
can be routed to the GPIO_D PMSYNC state. This bit selects between them:
0 = GPIO5 (default)
1 = GPIO0
GPIO_C Pin Selection (GPIO_C_SEL) — R/W. There are two possible GPIOs that
can be routed to the GPIO_C PMSYNC state. This bit selects between them:
0 = GPIO37 (default)
1 = GPIO4
GPIO_B Pin Selection (GPIO_B_SEL) — R/W. There are two possible GPIOs that
can be routed to the GPIO_B PMSYNC state. This bit selects between them:
0 = GPIO0 (default)
1 = GPIO37
GPIO_A Pin Selection (GPIO_A_SEL) — R/W. There are two possible GPIOs that
can be routed to the GPIO_A PMSYNC state. This bit selects between them:
0 = GPIO4 (default)
1 = GPIO5
Reserved
Chipset Configuration Registers
Attribute: R/W
Size: 32-bit
Description
Attribute: R/W
Size: 32-bit
Description
Attribute: R/W
Size: 32-bit
Description
Attribute: R/W
Size: 32-bit
Description
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