Intel 6 SERIES CHIPSET - DATASHEET 01-2011 Datasheet page 681

EHCI Controller Registers (D29:F0, D26:F0)
16.2.3.2 USBPID—USB PIDs Register
Offset:
Default Value:
This Dword register is used to communicate PID information between the USB debug
driver and the USB debug port. The debug port uses some of these fields to generate
USB packets, and uses other fields to return PID information to the USB debug driver.
Bit
31:24
23:16
15:8
7:0
16.2.3.3 DATABUF[7:0]—Data Buffer Bytes[7:0] Register
Offset:
Default Value:
This register can be accessed as 8 separate 8-bit registers or 2 separate 32-bit register.
Bit
63:0
16.2.3.4 CONFIG—Configuration Register
Offset:
Default Value:
Bit
31:15
14:8
7:4
3:0
Datasheet
MEM_BASE + A4h–A7h
00000000h
Reserved.
RECEIVED_PID_STS[23:16] — RO. Hardware updates this field with the received
PID for transactions in either direction. When the controller is writing data, this field is
updated with the handshake PID that is received from the device. When the host
controller is reading data, this field is updated with the data packet PID (if the device
sent data), or the handshake PID (if the device NAKs the request). This field is valid
when the hardware clears the GO_DONE#_CNT bit.
SEND_PID_CNT[15:8] — R/W. Hardware sends this PID to begin the data packet
when sending data to USB (that is, WRITE_READ#_CNT is asserted). Software
typically sets this field to either DATA0 or DATA1 PID values.
TOKEN_PID_CNT[7:0] — R/W. Hardware sends this PID as the Token PID for each
USB transaction. Software typically sets this field to either IN, OUT, or SETUP PID
values.
MEM_BASE + A8h–AFh
0000000000000000h
DATABUFFER[63:0] — R/W. This field is the 8 bytes of the data buffer. Bits 7:0
correspond to least significant byte (byte 0). Bits 63:56 correspond to the most
significant byte (byte 7).
The bytes in the Data Buffer must be written with data before software initiates a write
request. For a read request, the Data Buffer contains valid data when DONE_STS bit
(offset A0, bit 16) is cleared by the hardware, ERROR_GOOD#_STS (offset A0, bit 6) is
cleared by the hardware, and the DATA_LENGTH_CNT field (offset A0, bits 3:0)
indicates the number of bytes that are valid.
MEM_BASE + B0–B3h
00007F01h
Reserved
USB_ADDRESS_CNF — R/W. This 7-bit field identifies the USB device address used
by the controller for all Token PID generation. (Default = 7Fh)
Reserved
USB_ENDPOINT_CNF — R/W. This 4-bit field identifies the endpoint used by the
controller for all Token PID generation. (Default = 1h)
Attribute: R/W, RO
Size: 32 bits
Description
Attribute: R/W
Size: 64 bits
Description
Attribute: R/W
Size: 32 bits
Description
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