Intel 6 SERIES CHIPSET - DATASHEET 01-2011 Datasheet page 466

Bit
7:4
3:0
13.1.30 BIOS_SEL2—BIOS Select 2 Register
(LPC I/F—D31:F0)
Offset Address: D4h
Default Value:
Bit
15:12
11:8
7:4
3:0
466
BIOS_C8_IDSEL — R/W. IDSEL for two 512-KB BIOS memory ranges. The IDSEL
programmed in this field addresses the following memory ranges:
FFC8 0000h – FFCF FFFFh
FF88 0000h – FF8F FFFFh
BIOS_C0_IDSEL — R/W. IDSEL for two 512-KB BIOS memory ranges. The IDSEL
programmed in this field addresses the following memory ranges:
FFC0 0000h – FFC7 FFFFh
FF80 0000h – FF87 FFFFh
D5h
–
4567h
BIOS_70_IDSEL — R/W. IDSEL for two, 1-M BIOS memory ranges. The IDSEL
programmed in this field addresses the following memory ranges:
FF70 0000h – FF7F FFFFh
FF30 0000h – FF3F FFFFh
BIOS_60_IDSEL — R/W. IDSEL for two, 1-M BIOS memory ranges. The IDSEL
programmed in this field addresses the following memory ranges:
FF60 0000h – FF6F FFFFh
FF20 0000h – FF2F FFFFh
BIOS_50_IDSEL — R/W. IDSEL for two, 1-M BIOS memory ranges. The IDSEL
programmed in this field addresses the following memory ranges:
FF50 0000h – FF5F FFFFh
FF10 0000h – FF1F FFFFh
BIOS_40_IDSEL — R/W. IDSEL for two, 1-M BIOS memory ranges. The IDSEL
programmed in this field addresses the following memory ranges:
FF40 0000h – FF4F FFFFh
FF00 0000h – FF0F FFFFh
LPC Interface Bridge Registers (D31:F0)
Description
Attribute: R/W
Size: 16 bits
Description
Datasheet