Interrupt Mapping; Periodic Vs. Non-Periodic Modes; Legacy Replacement Routing - Intel 6 SERIES CHIPSET - DATASHEET 01-2011 Datasheet

Functional Description
5.17.2

Interrupt Mapping

Mapping Option #1 (Legacy Replacement Option)
In this case, the Legacy Replacement Rout bit (LEG_RT_CNF) is set. This forces the
mapping found in
Table 5-42. Legacy Replacement Routing
Timer
0
1
2 & 3
4, 5, 6, 7
NOTE: The Legacy Option does not preclude delivery of IRQ0/IRQ8 using direct FSB interrupt
messages.
Mapping Option #2 (Standard Option)
In this case, the Legacy Replacement Rout bit (LEG_RT_CNF) is 0. Each timer has its
own routing control. The interrupts can be routed to various interrupts in the 8259 or
I/O APIC. A capabilities field indicates which interrupts are valid options for routing. If a
timer is set for edge-triggered mode, the timers should not be share with any PCI
interrupts.
For the PCH, the only supported interrupt values are as follows:
Timer 0 and 1: IRQ20, 21, 22 & 23 (I/O APIC only).
Timer 2: IRQ11 (8259 or I/O APIC) and IRQ20, 21, 22 & 23 (I/O APIC only).
Timer 3: IRQ12 (8259 or I/O APIC) and IRQ 20, 21, 22 & 23 (I/O APIC only).
Interrupts from Timer 4, 5, 6, 7 can only be delivered using direct FSB interrupt
messages.
5.17.3

Periodic vs. Non-Periodic Modes

Non-Periodic Mode
Timer 0 is configurable to 32 (default) or 64-bit mode, whereas Timers 1, 2 and 3 only
support 32-bit mode (See
All of the timers support non-periodic mode.
Refer to Section 2.3.9.2.1 of the IA-PC HPET Specification for a description of this
mode.
Datasheet
Table 5-42.
8259 Mapping APIC Mapping
IRQ0
IRQ8
Per IRQ Routing
Per IRQ Routing Field
Field.
not available not available
Section 20.1.5).
In this case, the 8254 timer will
IRQ2
not cause any interrupts
In this case, the RTC will not cause
IRQ8
any interrupts.
Comment
201