Intel 6 SERIES CHIPSET - DATASHEET 01-2011 Datasheet page 26

21.4.4 FADDR—Flash Address Register
(GbE LAN Memory Mapped Configuration Registers) .................................. 836
21.4.5 FDATA0—Flash Data 0 Register
(GbE LAN Memory Mapped Configuration Registers) .................................. 836
21.4.6 FRAP—Flash Regions Access Permissions Register
(GbE LAN Memory Mapped Configuration Registers) .................................. 837
21.4.7 FREG0—Flash Region 0 (Flash Descriptor) Register
(GbE LAN Memory Mapped Configuration Registers) .................................. 838
21.4.8 FREG1—Flash Region 1 (BIOS Descriptor) Register
(GbE LAN Memory Mapped Configuration Registers) .................................. 838
21.4.9 FREG2—Flash Region 2 (Intel® ME) Register
(GbE LAN Memory Mapped Configuration Registers) .................................. 838
21.4.10FREG3—Flash Region 3 (GbE) Register
(GbE LAN Memory Mapped Configuration Registers) .................................. 839
21.4.11PR0—Protected Range 0 Register
(GbE LAN Memory Mapped Configuration Registers) .................................. 839
21.4.12PR1—Protected Range 1 Register
(GbE LAN Memory Mapped Configuration Registers) .................................. 840
21.4.13SSFS—Software Sequencing Flash Status Register
(GbE LAN Memory Mapped Configuration Registers) .................................. 841
21.4.14SSFC—Software Sequencing Flash Control Register
(GbE LAN Memory Mapped Configuration Registers) .................................. 842
21.4.15PREOP—Prefix Opcode Configuration Register
(GbE LAN Memory Mapped Configuration Registers) .................................. 843
21.4.16OPTYPE—Opcode Type Configuration Register
(GbE LAN Memory Mapped Configuration Registers) .................................. 843
21.4.17OPMENU—Opcode Menu Configuration Register
(GbE LAN Memory Mapped Configuration Registers) .................................. 844
22 Thermal Sensor Registers (D31:F6) ....................................................................... 845
22.1 PCI Bus Configuration Registers......................................................................... 845
22.1.1 VID—Vendor Identification ..................................................................... 846
22.1.2 DID—Device Identification ..................................................................... 846
22.1.3 CMD—Command................................................................................... 846
22.1.4 STS—Status......................................................................................... 847
22.1.5 RID—Revision Identification ................................................................... 847
22.1.6 PI— Programming Interface ................................................................... 847
22.1.7 SCC—Sub Class Code ............................................................................ 848
22.1.8 BCC—Base Class Code........................................................................... 848
22.1.9 CLS—Cache Line Size ............................................................................ 848
22.1.10LT—Latency Timer ................................................................................ 848
22.1.11HTYPE—Header Type............................................................................. 848
22.1.12TBAR—Thermal Base............................................................................. 849
22.1.13TBARH—Thermal Base High DWord ......................................................... 849
22.1.14SVID—Subsystem Vendor ID.................................................................. 849
22.1.15SID—Subsystem ID .............................................................................. 850
22.1.16CAP_PTR—Capabilities Pointer ................................................................ 850
22.1.17INTLN—Interrupt Line ........................................................................... 850
22.1.18INTPN—Interrupt Pin ............................................................................. 850
22.1.19TBARB—BIOS Assigned Thermal Base Address.......................................... 851
22.1.20TBARBH—BIOS Assigned Thermal Base High DWord .................................. 851
22.1.21PID—PCI Power Management Capability ID .............................................. 852
22.1.22PC—Power Management Capabilities ....................................................... 852
22.1.23PCS—Power Management Control And Status ........................................... 853
22.2 Thermal Memory Mapped Configuration Registers
(Thermal Sensor – D31:F26) ............................................................................. 854
22.2.1 TSIU—Thermal Sensor In Use................................................................. 855
22.2.2 TSE—Thermal Sensor Enable.................................................................. 855
22.2.3 TSS—Thermal Sensor Status .................................................................. 855
22.2.4 TSTR — Thermal Sensor Thermometer Read ............................................ 856
22.2.5 TSTTP—Thermal Sensor Temperature Trip Point........................................ 856
22.2.6 TSCO—Thermal Sensor Catastrophic Lock-Down ....................................... 856
22.2.7 TSES—Thermal Sensor Error Status ........................................................ 857
22.2.8 TSGPEN—Thermal Sensor General Purpose Event Enable ........................... 858
22.2.9 TSPC—Thermal Sensor Policy Control ...................................................... 859
22.2.10PTA—PCH Temperature Adjust................................................................ 860
22.2.11TRC—Thermal Reporting Control ............................................................. 860
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Datasheet