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External Memory Interface Pins
The pins used by the external memory interface are described in
Table
3-8.
Table 3-8. External Memory Pin Descriptions
Pin Name
DATA31–0
ADDR23–0
SDCLK
SDCKE
SDA10
SDRAS
SDCAS
SDWE
MS3–0
RD
WR
ACK
ADSP-21368 SHARC Processor Hardware Reference
I/O
Description for AMI
I/O
Data bus
O
Address bus
O
N/A
O
N/A
O
N/A
O
N/A
O
N/A
O
N/A
O
Chip select
O
Read output strobe
O
Write output strobe
I
Acknowledge signal
External Port
Description for SDRAM
Data bus
Address bus, includes bank selects
ADDR [23:0]
SDRAM clock
SDRAM clock enable
SDRAM address bit 10 used for auto
refresh
SDRAM row address strobe
SDRAM column address strobe
SDRAM write enable
Chip select. MS1-0, FLAG2 and
FLAG3 are muxed to form MS3-2,
(FLAG3 is MS3 and FLAG2 is MS2
N/A
N/A
N/A
3-19
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