Analog Devices SHARC ADSP-21368 Hardware Reference Manual page 416

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Programming Examples
#define CPHASE
/*========================================================*/
.section/dm seg_dmda;
/* Destinations for incoming data */
.var dest_bufC[8];
.var dest_bufB[8];
.var dest_bufA[8];
/* Transfer Control Blocks (TCB's)
.var first_tcb[] =
(0x7FFFF&second_tcb + 3),
LENGTH(dest_bufB),
.var second_tcb[] = 0,
LENGTH(dest_bufC),
/* NOTE: Chain Pointer registers must point to the LAST
location in the TCB, "tcb + 3". */
/*Main code section */
.global _main;
.section/pm seg_pmco;
_main:
/* clear SPI settings */
r0 = 0;
dm(SPICTL) = r0;
dm(SPIFLG) = r0;
dm(SPIDMAC) = r0;
6-44
(0x0400) /* if 1, data's sampled on second
(middle) edge of SPICLK cycle*/
1,
dest_bufB;
/* null CPSPI ends chain
/* count for final DMA
1,
/* IM for final DMA
dest_bufC;
/* II for final DMA
ADSP-21368 SHARC Processor Hardware Reference
*/
/* for CPSPI (next tcb) */
/* for CSPI (next count) */
/* for IMSPI (next modify) */
/* for IISPI (next index) */
*/
*/
*/
*/

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