Analog Devices SHARC ADSP-21368 Hardware Reference Manual page 121

Table 3-4. Logical Versus Physical Address Mapping, 16-Bit Asynchronous
Memory
Logical Address Dispatched
by Program Sequencer
0x200000
0x200001
0x200002
...
...
...
0x555554
Table 3-5 and
maps for external SDRAM. In SDRAM, there is an additional 2 bits of
address generation available to the SDRAM controller. Therefore, the
external addressable range is larger than with asynchronous memory and
the entire allowable internal address range of 24 bits can be accessed in
external memory.
In Table 3-5, N = 0xE00000. Therefore, the total number of external
memory instructions for a 32-bit wide SDRAM memory is 14 million.
ADSP-21368 SHARC Processor Hardware Reference
Physical Address Observed
on the External Address Bus
0x600000
0x600001
0x600002
0x600003
0x600004
0x600005
0x600006
0x600007
0x600008
...
...
...
0xFFFFFD
0xFFFFFE
0xFFFFFF
Table 3-6 show the logical to physical address translation
External Port
Data
16 0
Instr0[15:0]
Instr0[31:16]
Instr0[47:32]
Instr1[15:0]
Instr1[31:16]
Instr1[47:32]
Instr2[15:0]
Instr2[31:16]
Instr2[47:32]
InstrN[15:0]
InstrN[31:16]
InstrN[47:32]
3-13