Analog Devices SHARC ADSP-21368 Hardware Reference Manual page 423

Table 7-1. Serial Modes
Bit Field Values
IDP_SMODEx
000
001
010
011
100
101
110
111
Figure 7-4. FIFO Data Packing for I
Figure 7-5. FIFO Data Packing for Right-Justified
ADSP-21368 SHARC Processor Hardware Reference
Mode
Left-justified sample pair
2
I S
Left-justified 32 bits. This is a single data and not a left/right
channel pair. It can be read as 32-bit data.
2
I S-32 bit. This is a single data and not a left/right channel
pair. It can be read as 32-bit data.
Right-justified sample pair 24 bits
Right-justified sample pair 20 bits
Right-justified sample pair 18 bits
Right-justified sample pair 16 bits
24-Bit
Audio
Data (31–8)
2
S and Left-Justified
24-Bit
Audio
Data (31–8)
Input Data Port
User Data Block Status
Channel
Encoding
7 6 5 4 3
Bits (2–0)
Validity Channel L/R Encoding
Status
Channel
Spare Bits (7–4)
Encoding
3
Set to LOW
Bits (2–0)
L/R Encoding
7-5