Analog Devices SHARC ADSP-21368 Hardware Reference Manual page 93

3. If circular buffering is needed, then program additional writes to
the
ELEP
the
ELEP
buffering is used with the normal chained DMA, all the DMA
blocks will have same
4. Enable DMA (
if needed, in the
are flushed (
Once the DMA control register is initialized, the DMA controller fetches
the DMA descriptors from the address pointed to by the external port
chain pointer register (
shown in Table
Table 2-9. Chain Pointer Loading Sequence (Normal DMA)
Address
CPEP[18:0]
CPEP[18:0] – 0x1
CPEP[18:0] – 0x2
CPEP[18:0] – 0x3
CPEP[18:0] – 0x4
CPEP[18:0] – 0x5
The order the descriptors are fetched with circular buffering enabled is
shown in Table 2-10
ADSP-21368 SHARC Processor Hardware Reference
and registers. Note that for normal chained DMA,
EBEP
and registers are not part of the TCB. So if circular
EBEP
ELEP
), chaining (
DEN
registers. It is advised that the DMA FIFOs
DMACx
) when DMA is enabled.
DFLSH
). The order the descriptors are fetched is
CPEP
2-9.
Register Value
IIEP
IMEP
ICEP
EIEP
EMEP
CPEP
and values.l
EBEP
), and circular buffering (
CHEN
I/O Processor
)
CBEN
2-37