Analog Devices SHARC ADSP-21368 Hardware Reference Manual page 868

Hide thumbs Also See for SHARC ADSP-21368:
Table of Contents

Advertisement

Index
frame sync
both enable (FS_BOTH) bit,
early vs. late,
5-40
equations,
13-11
frequencies,
5-69
in multichannel mode,
internal vs. external,
options (FS_BOTH and DIFS), 5-18,
5-24
options (FS_BOTH),
output, synchronizing,
PCG B source (FSBSOURCE) bit,
13-13
signals, configuring,
SPORT frame on rising frame sync
(FRFS) bit,
5-17
SPORT frame sync required (FSR) bit,
5-63
frame sync rates
setting in SPORTs, 5-17,
setting the internal serial clock in
SPORTs,
5-21
framed versus unframed data in SPORTs,
5-37
framing bits, SPORT,
freezing, channel (in external port DMA),
3-18
frequencey mode, single-channel,
double-frequency,
frequency of the frame sync output,
full-duplex operation, specifications,
G
general-purpose (GPIO) and flags for
digital audio interface,
general-purpose IOP timer 2 interrupt
mask (GPTMR2IMSK) bit,
general-purpose IOP timer interrupt mask
(GPTMRxIMSK) bits,
generators, optional reset,
I-12
(continued)
5-64
5-28
5-38
5-18
13-7
5-6
5-21
5-17
9-8
13-9
5-6
4-64
B-10
B-10
14-27
ADSP-21368 SHARC Processor Hardware Reference
glitch vulnerability (SPORTs),
GM (get more data) bit, 6-11, 6-20, 6-37,
A-54
ground plane, in PCB design,
groupings of signals in DAI/DPI,
H
handshaking, external port, 3-20,
hardware interrupt
bits, B-15, B-16, B-19, B-20,
signals IRQ2-0, 14-4, 14-6, 14-8, B-16,
B-24
high and low priority latches, 2-7,
hold cycle (external bus) bit,
hold cycles, external port,
hold off, processor bus transition,
hold time
inputs,
14-32
recognition of asynchronous input,
14-32
hold time cycles, setting,
hysteresis on RESET pin,
I
I/O address breakpoint hit (STATI0) bit,
A-181
I/O interface to peripheral devices,
I/O processor
See also DMA; specific peripherals
address bus (IOA),
2-29
addressing in,
2-29
bandwidth,
2-12
baud rate,
2-43
bus arbitration and contention,
bus diagram,
2-25
bus grant,
2-21
chain insertion mode (DMA),
chain pointer (CPSPI) register,
chain pointer registers, 2-27,
5-10
14-34
4-8
3-79
B-24
4-69
A-18
3-23
3-84
3-23
14-33
5-1
2-20
2-41
2-16
2-43

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the SHARC ADSP-21368 and is the answer not in the manual?

Subscribe to Our Youtube Channel

Table of Contents