Receive Buffer Registers (Uartxrbr - Analog Devices SHARC ADSP-21368 Hardware Reference Manual

UART Control and Status Registers

Receive Buffer Registers (UARTxRBR)

These read-only registers (shown in
address as the write-only
the bit in the
UARTDLAB
bit is cleared, writes to this address target the
UARTDLAB
while reads from this address return the
UART0RBR (0x3C00)
UART1RBR (0x4000)
Zero-Filled
Zero-Filled
Figure A-51. UART Receive Buffer Registers
There are also shadow registers,
(0x3C08) and
UART0RBRSH
programs to read the contents of the corresponding main register without
affecting the status of the UART.
A-122
UARTxTHR
register must be cleared. When the
UARTxLCR
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
0 0 0 0 0 0 0 0
15 14 13 12 11 10 9
0 0 0 0 0 0 0
UARTxRBRSH
UART1RBRSH
ADSP-21368 SHARC Processor Hardware Reference
Figure A-51) are mapped to the same
and registers. To access
DLL
registers.
UARTxRBR
0 0 0 0 0 0 0
8 7 6 5 4 3 2 1
0 0 0 0 0 0 0 0
, with the following addresses:
(0x4008). These registers allow
UARTxRBR
registers,
UARTxTHR
0
Higher Byte
RX9D1
0
0
Lower Byte
RX9D0
,