Analog Devices SHARC ADSP-21368 Hardware Reference Manual page 544

Packing Mode
The
LSR
because the latter clears the
clears both the address-detect and the data-ready interrupts. In
non-packed mode, when the address-detect interrupt is generated,
it means that the data is ready in the
mode, this is not the case.
11-16
register must be read before reading the
ADSP-21368 SHARC Processor Hardware Reference
bit. Reading the
DR
buffer while in packed
RBR
register,
UARTxRBR
register
UARTxRBR