Analog Devices SHARC ADSP-21368 Hardware Reference Manual page 752

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Sample Rate Converter Registers
Table A-43. SRCCTL1 Register Bit Descriptions (Cont'd)
Bit
Name
4–2
SRC2_SMODEIN
5
SRC2_BYPASS
7–6
SRC2_DEEMPHASIS
8
SRC2_SOFTMUTE
9
SRC2_DITHER
11–10
SRC2_SMODEOUT
A-104
Description
Serial Input Format. Selects the serial input format for
SRC 2 as follows.
000 =Default, format is left-justified
2
001 = I
S
010 = TDM
100 = 24-bit right-justified
101 = 20-bit right-justified
110 = 18-bit right-justified
111 = 16-bit right-justified
Bypass SRCx. Output of SRC 2 is the same as input
De-emphasis Filter Select. Enables de-emphasis on
incoming audio data for SRC 2.
00 = No de-emphasis
01 = 33 kHz
10 = 44.1 kHz
11 = 48 kHz
Soft Mute. Enables soft mute on SRC 2.
0 = No mute
1 = Mute (default)
Dither Select. Enables dithering on SRC 2 when a word
length less than 24 bits is selected.
0 = Dithering is disabled (default)
1 = Dithering is enabled
Serial Output Format. Selects the serial output format
on SRC 2 as follows:
00 = Left-justified (default)
2
01 = I
S
10 = TDM mode
11 = Right-justified
ADSP-21368 SHARC Processor Hardware Reference

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