Analog Devices SHARC ADSP-21368 Hardware Reference Manual page 883

software interrupt (SFT0x) bit, B-18, B-21,
B-26
software interrupt x, user (SFTxI) bit, B-18,
B-21, B-26
software reset (SRST) bit,
SOVFI (stack overflow/full) bit, B-15,
B-19, B-23
SP0I (serial port interrupt) bit,
SP2I (serial port interrupt) bit,
SP4I (serial port interrupt) bit,
SPCNTx (serial port count) registers,
SPCTLx (serial port control) registers,
2-26, 5-4, 5-6, 5-7, 5-59,
SPCTLx control bits for left-justify sample
pair mode, 5-13
SPDIF_TX_CHSTA (Sony/Philips digital
interface channel status) register,
A-89, A-90, A-91
SPDIF_TX_CTL (Sony/Philips digital
interface transmit control) register,
A-86
special IDP registers, A-109
specifications, timing, 14-28
SPEN_A (serial port channel A enable) bit,
5-17, 5-61, A-37
SPEN_B (serial port channel B enable) bit,
5-17, 5-61
SPI
See also SPI bits, registers
block diagram, 6-3
broadcast mode, 6-3,
chaining, DMA, 6-16
change clock polarity,
changing configuration,
clock (SPICLK) pin, 6-4, 6-5, 6-8,
clock (SPICLK) signal,
clock phase, 6-28
clock rate, 6-5
clock signal (SPICLK),
clock, active edge, defined,
ADSP-21368 SHARC Processor Hardware Reference
A-6
B-8
B-8
B-9
A-45
5-72
6-8
6-21
6-21
6-27
6-2
6-4
6-5
SPI
clock, sampling edge, defined,
configuring and enabling,
data transfer operations,
device select signal, 6-6
DMA, 6-14 to 6-27,
DMA, switching from transmit to receive
mode, 6-23
error signals and flags,
features, 6-1
finished (SPIF) bit, 6-30
FLAGx pins, 6-4
formats, 6-35
functional description,
general operations, 6-8
interface signals, 6-4
interrupts, 6-14, 6-17,
master input slave output (MISOx) pins,
6-2, 6-7
master mode operation, configuring for,
6-10
master out slave in (MOSIx) pins, 6-2,
6-7, 6-8
master-slave interconnections,
MISOx (master in, slave out) pins,
multidevice configuration,
multimaster environment,
multimaster error or mode-fault error
(MME) bit, 6-9
open drain output enable (OPD) pin,
6-9
operation, master mode,
operation, slave mode,
operations, 6-8, 6-10
packed data transfers,
programming examples,
receive buffer register (RXSPI, RXSPIB),
2-26
receive data (RXSPI) buffer, 6-2,
registers, A-52 to A-65
Index
(continued)
6-5
6-15
6-13
A-61 to A-65
6-35
6-2
6-33
6-4
6-7
6-12
6-8
6-15
6-19
6-32
6-38
6-10
I-27