Analog Devices SHARC ADSP-21368 Hardware Reference Manual page 890

Index
system design
recommendations and suggestions,
14-34
RESET pin, 14-33
shared memory system diagram,
stalls, 14-54
switching frequencies,
timing specifications,
system status (SYSTAT) register,
T
TCB chain loading, 2-15,
TCK (test clock) pin, 14-12
TDI (test data input) pin,
TDM mode, time division multiplexed,
9-19
TDO (test data output) pin,
technical or customer support,
technical publications online or on the web,
-xxxix
TFSDIV (frame sync divisor) bit,
THR register empty (THRE) flag, 11-4,
11-13
time division multiplexed (TDM) mode,
5-25, 5-27, 9-19, 10-15,
timeout, bus mastership,
timer expired (TIMEXP) pin,
timers, UART, 11-1
timing
definitions, 14-29
external memory accesses,
IDP hold timing mode 00,
IDP hold timing mode 01,
2
IDP I S, 7-7
IDP left-justified sample pair,
PDAP, 7-14
SDRAM, 3-74
specifications, system design,
SPI clock, 6-5
SPI transfer protocol, 6-28,
I-34
(continued)
3-79
14-29
14-28
A-9
2-16
14-12
14-12
xxxv
A-45
10-19
3-87
14-8
3-36
7-13
7-14
7-7
14-28
6-29
ADSP-21368 SHARC Processor Hardware Reference
timing
SPORT framed vs. unframed data,
SPORT left-justified sample pair mode,
5-19
SPORT normal vs. alternate framing,
5-40
SPORT word select,
TIMOD (SPI transfer initiation mode) bit,
6-10, 6-34
TMS (test mode select) pin,
TMZHI (timer expired high priority) bit,
B-15, B-19, B-23
TMZLI (timer expired low priority) bit,
B-17, B-21, B-25
transfer control block (TCB),
transfer initiation and interrupt (SPI
TIMOD) mode, 6-34
transferring data words,
transmission error (SPI TUNF) bit,
transmit and receive channel order (FRFS),
5-18, 5-23
transmit and receive data buffers
(TXSPxA/B, RXSPxA/B),
transmit collision error (SPI TXCOL) bit,
6-37
transmit data (SPI TXSPI) buffer,
transmit frame sync divisor. See TFSDIV
bit
transmit shift register (SPI TXSR),
TRST (test reset) pin, 14-12
TUNF (SPI transmission error) bit,
TUVF_A (channel error status) bit, 5-65,
A-40
TWI controller
architecture, 12-2
block diagram, 12-3
bus arbitration, 12-12
call address, 12-14
clocking, 12-11
fast mode, setting, 12-14
(continued)
5-40
5-25
14-12
2-16
5-4
6-37
5-67
6-2
6-2
6-37