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Making Connections in the SRUs
SRU2_INPUT3
(0x1C03)
Reserved
FLAG12_I
Flag 12 Input
FLAG10_I
Flag 10 Input
FLAG9_I
Flag 9 Input
Figure 4-44. SRU2_INPUT3 Register
SRU2_INPUT4
(0x1C04)
Reserved
MISC2_I
Miscellaneous 2 Input
MISC0_I
Miscellaneous 0 Input
FLAG15_I
Flag 15 Input
Figure 4-45. SRU2_INPUT4 Register
4-54
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
0
0
0
0
0
0
0
15 14 13 12 11 10
9
0
0
0
0
0
0
0
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
0
0
0
0
0
0
0
15 14 13 12 11 10
9
8
0
0
0
0
0
0
0
0
ADSP-21368 SHARC Processor Hardware Reference
0
0
0
0
0
0
0
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
7
6
5
4
3
2
1
0
0
0
0
0
0
0
Reset = 0x00000000
0
0
FLAG10_I
Flag 10 Input
FLAG11_I
Flag 11 Input
0
0
FLAG7_I
Flag 7 Input
FLAG8_I
Flag 8 Input
Reset = 0x00000000
0
0
MISC0_I
Miscellaneous 0 Input
MISC1_I
MISC0_I
0
0
FLAG13_I
Flag 13 Input
FLAG14_I
Flag 14 Input
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