Notes On Using Dma With The Uart - Analog Devices SHARC ADSP-21368 Hardware Reference Manual

Notes On Using DMA With the UART

The following should be noted when performing DMA in conjunction
with the UART module.
1. DMA can be interrupted by resetting the
other control settings should be changed. If the UART is enabled
again, then interrupted DMA can be resumed by resetting the
bit.
2. Disabling the UART by resetting the enable (
the transmit/receive buffer. Resetting the UART during a DMA
operation is prohibited and leads to data loss.
3. Do not disable chaining (
chaining DMA is in progress. If this occurs, a DMA completion
interrupt will not be generated when the PCI bit = 1.
4. During a receive DMA, a read of the receiver buffer (
not allowed. If needed, programs should read the receiver shadow
buffer (
5. During DMA, the
automatically.
6. DMA may be used in 9-bit mode, once the address has been
detected. If, between DMAs, another address is received, an
address detect interrupt is generated (if enabled). At this point, the
UARTxRBRSH
address). The
detect) bit.
ADSP-21368 SHARC Processor Hardware Reference
).
UARTxRBRSH
UARTDR
shadow register can be read to find the 9-bit word (the
register also shows the
UARTxLSR
DEN
bit in the control registers) when a
CHEN
bit in the
UARTxLSR
I/O Processor
bit, but none of the
DEN
) bit flushes data in
EN
) is
UARTxRBR
register is cleared
(address
UARTRX9D
2-47