Contents
Dead Time ............................................................................. 8-6
Duty Cycles ............................................................................ 8-7
Over Modulation .............................................................. 8-12
Update Modes ...................................................................... 8-15
Single Update ................................................................... 8-15
Double Update ................................................................. 8-15
Crossover ......................................................................... 8-16
PWM Accuracy ..................................................................... 8-17
PWM Registers .......................................................................... 8-18
Duty Cycles .......................................................................... 8-19
Output Enable ...................................................................... 8-20
S/PDIF TRANSMITTER/RECEIVER
Subframe Format .................................................................... 9-3
Channel Coding ..................................................................... 9-5
Preambles ............................................................................... 9-6
S/PDIF Transmitter ...................................................................... 9-7
Channel Status ........................................................................ 9-9
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ADSP-21368 SHARC Processor Hardware Reference