Analog Devices SHARC ADSP-21368 Hardware Reference Manual page 830

Enhanced Emulation Status Register
Table A-72. EEMUSTAT Register Bit Descriptions (Cont'd)
Bit Name
11 EEMUOUTFULL
12 EEMUINFULL
13 EEMUENS
14 OSPIDENS
15 EEMUINENS
16 STATIOY
31–17 Reserved
1 Internal hardware sets this bit.
2 This bit is set and reset by the core.
3 The FIFO controller sets and resets this bit.
4 Internal hardware sets and resets this bit.
A-182
Description
Enhanced Emulation EEMUOUT FIFO Status.
0 = EEMUOUT FIFO is not full
1 = EEMUOUT FIFO full
Enhanced Emulation EEMUIN Register Status.
0 = EEMUIN register is empty
1 = EEMUIN register full
Enhanced Emulation Feature Enable.
0 = Enhanced emulation feature enable
1 = Enhanced emulation feature disable
OSPID Register Enable.
0 = OSPID register enable
1 = OSPID register disable
EEMUIN Interrupt Enable.
0 = EEMUIN interrupt disable
1 = EEMUIN interrupt enable
IOY Memory Breakpoint Status
0 = No breakpoint occurs
1 = Breakpoint occurs
ADSP-21368 SHARC Processor Hardware Reference
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