DAI/DPI Registers
The registers that are described in the following sections are contained
within the digital audio and digital peripheral interfaces. The bits in these
registers are used to enable the connection of peripherals and to view sta-
tus of data transfers. For complete information on using the DAI/DPI, see
Chapter 4, Digital Audio/Digital Peripheral
Digital Audio Interface Status Register (DAI_STAT)
The
DAI_STAT
and described in
reflected in
IDP_DMAx_STAT
bits are set once the
of that channel is transferred (see
(IDP_CTL0)" on page
once the required number of data transfers occurs. And even when DMA
through some channel is not intended, its
ADSP-21368 SHARC Processor Hardware Reference
register is a read-only register and is shown in
Table
A-45. The state of all eight DMA channels is
(bits 24-17 of the
bit is set and remains set till the last data
IDP_DMA_EN
A-66). Even if the
Register Reference
Interfaces.
DAI_STAT
"Input Data Port Control Register 0
IDP_DMA_EN
IDP_DMAx_STAT
Figure A-41
register). These
bit is set, it goes low
bit goes high.
A-109
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