SPI General Operations
Once the
sending and receiving data on active
The reception or transmission continues until
The slave device continues to receive or transmit with each new
active
SPICLK
In slave mode, if the transmit buffer remains empty, or the receive buffer
remains full, the devices operate according to the states of the
bits in the
GM
SPICTLx
• If
SENDZ
transmits zeros on the
• If
SENDZ
transmits the last word it transmitted before the transmit buffer
became empty.
• If
= 1 and the receive buffer is full, the device continues to
GM
receive new data from the
the
RXSPI
• If
= 0 and the receive buffer is full, the incoming data is dis-
GM
carded, and the
Multimaster Operation
A multimaster mode is implemented in the processor to allow an SPI sys-
tem to transfer mastership from one SPI device to another. In a
multidevice SPI configuration, several SPI ports are connected and any
one (but only one) can become a master at any given time.
If a processor is a slave and wishes to become the SPI master, it asserts the
pin for the processor that is currently master and then drives the
SPIDS
signal. Once the master device receives the
SPICLK
6-12
signal's falling edge is detected, the slave starts
SPIDS
clock edge while the
registers.
= 1 and the transmit buffer is empty, the device repeatedly
MISO
= 0 and the transmit buffer is empty, the device repeatedly
MOSI
buffer.
registers are not updated.
RXSPIx
ADSP-21368 SHARC Processor Hardware Reference
edges.
SPICLK
signal is active.
SPIDS
pin.
pin, overwriting the older data in
SPIDS
is released.
SPIDS
and
SENDZ
signal, it is
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