SERIAL I/O
7.2 Block description
7.2.7 UARTi transmit interrupt control and UARTi receive interrupt control registers
When using UARTi, 2 types of interrupts, which are UARTi transmit and UARTi receive interrupts, can be
used. Each interrupt has its corresponding interrupt control register. Figure 7.2.12 shows the structure of
UARTi transmit interrupt control and UARTi receive interrupt control registers.
For details about interrupts, refer to "Chapter 4. INTERRUPTS."
b7
b6
b5
b4
b3
b2
Fig. 7.2.12 Structure of UARTi transmit interrupt control and UARTi receive interrupt control registers
7–14
b1
b0
UART0 transmit interrupt control register (Address 71
UART0 receive interrupt control register (Address 72
UART1 transmit interrupt control register (Address 73
UART1 receive interrupt control register (Address 74
Bit
Interrupt priority level select bits
0
1
2
Interrupt request bit
3
7 to 4
Nothing is assigned.
7751 Group User's Manual
Bit name
b2 b1 b0
0 0 0 : Level 0 (Interrupt disabled)
0 0 1 : Level 1
0 1 0 : Level 2
0 1 1 : Level 3
1 0 0 : Level 4
1 0 1 : Level 5
1 1 0 : Level 6
1 1 1 : Level 7
0 : No interrupt request
1 : Interrupt request
)
16
)
16
)
16
)
16
Functions
Low level
High level
RW
At reset
RW
0
0
RW
0
RW
0
RW
–
Undefined