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6.4.2 Operation in event counter mode
When the count start bit is set to "1," the counter starts counting of the count source.
The counter counts the count source's valid edges.
When the counter underflows, the reload register's contents are reloaded and counting continues.
The timer Bi interrupt request bit is set to "1" when the counter underflows in
The interrupt request bit remains set to "1" until the interrupt request is accepted or the interrupt request
bit is cleared to "0" by software.
Figure 6.4.3 shows an example of operation in the event counter mode.
FFFF
16
n
0000
16
"1"
Count start bit
"0"
"1"
Timer Bi interrupt
request bit
"0"
Fig. 6.4.3 Example of operation in event counter mode
n = Reload register's contents
Starts counting.
Set to "1" by software.
Cleared to "0" when interrupt request is accepted or cleared by software.
7751 Group User's Manual
6.4 Event counter mode
Stops counting.
Cleared to "0" by
Set to "1" by software.
software.
TIMER B
.
Restarts counting .
Time
6–17
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