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CENTRAL PROCESSING UNIT (CPU)
2.1 Central processing unit
2.1.7 Data bank register (DT)
The data bank register is an 8-bit register. In the following addressing modes using the data bank register,
the contents of this register is used as the high-order 8 bits (bank) of a 24-bit address to be accessed.
Use the LDT instruction to set a value to this register.
In the single-chip mode, make sure to fix this register to "00
single-chip mode is the internal area within the bank 0
This register is cleared to "00
Addressing modes using data bank register
•Direct indirect
•Direct indexed X indirect
•Direct indirect indexed Y
•Absolute
•Absolute bit
•Absolute indexed X
•Absolute indexed Y
•Absolute bit relative
•Stack pointer relative indirect indexed Y
•Multiplied accumulation
2.1.8 Direct page register (DPR)
The direct page register is a 16-bit register. The contents of this register indicate the direct page area
which is allocated in bank 0
use the direct page register.
The contents of the direct page register indicate the base address (the lowest address) of the direct page
area. The space which extends to 256 bytes above that address is specified as a direct page.
The direct page register can contain a value from "0000
or more than "FF01
16
When the contents of low-order 8 bits of the direct page register is "00
to generate an address is 1 cycle smaller than the number when its contents are not "00
the access efficiency can be enhanced in this case.
This register is cleared to "0000
Figure 2.1.4 shows a setting example of the direct page area.
Addressing modes using direct page register
•Direct
•Direct bit
•Direct indexed X
•Direct indexed Y
•Direct indirect
•Direct indexed X indirect
•Direct indirect indexed Y
•Direct indirect long
•Direct indirect long indexed Y
•Direct bit relative
2–6
" at reset.
16
or in the space across banks 0
16
," the direct page area spans the space across banks 0
" at reset.
16
7751 Group User's Manual
". It is because the access space of the
16
.
16
and 1
. The following addressing modes
16
16
" to "FFFF
." When it contains a value equal to
16
16
," the number of cycles required
16
and 1
.
16
16
." Accordingly,
16
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