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APPLICATIONS
17.1 Memory expansion
M37751
A
–A
8
23
(D
–D
)
0
15
A
–A
0
7
RDY
E
1
AC04
Circuit condition: f(X
1
1
E
CS
2
1Q (AC74)
2Q (AC74)
RDY
Sum of propagation delay time for BC32
and AC04(max. : 30.5 ns)
Fig. 17.1.10 Example of using Ready function (at 3 φ access in high–speed running)
17–14
Address
Address
decode
latch circuit
circuit
2Q
1D
1Q
2D
1
1T
2T
1
AC74
) ≤ 28 MHz, 3 access in high–speed running
IN
A
t
c
t
d
(E-
)
1
t
su
(RDY-
)
1
7751 Group User's Manual
Data bus
1 to 4
Use the elements of which sum of
CS
1
propagation delay time is within 30.5 ns.
CS
2
Address bus
4
BC32
3
BC32
Ready function is available
2
only for areas accessed
by CS
.
2
B
Ready request is accepted at the RDY pin input
level judgment timing A .
Ready state release request is accepted at the
RDY pin input level judgment timing B .
:The condition satisfying t
is tc ≥ 35.25 ns.
Accordingly, when f(X
circuit example satisfies t
: E ( "L" level) stop by Ready function.
t
su
(RDY-
)
1
2 , AC74,
≥ 40 ns
su(RDY-
)
1
) ≤ 28 MHz, this
IN
≥ 40 ns.
su(RDY-
)
1
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