Renesas 7700 FAMILY User Manual page 196

•Example of 1ST–8DATA–1PAR–1SP
"H"
Fig. 7.4.2 Example of transfer data format
Table 7.4.6 Each bit in transmit data
Name
ST
Start bit
DATA
Character bit
PAR
Parity bit
ST
Stop bit
7.4 Clock asynchronous serial I/O (UART) mode
Transmit/Receive data
DATA (8 bits)
ST LSB
"L" signal equivalent to 1 character bit which is added immediately before the
character bits. It indicates start of data transmission.
Transmit data which is set in the UARTi transmit buffer register.
A signal that is added immediately after the character bits in order to improve data
reliability. The level of this signal changes according to selection of odd/even parity
in such a way that the sum of "1"s in this bit and character bits is always an odd
or even number.
"H" level signal equivalent to 1 or 2 character bits which is added immediately after
the character bits (or parity bit when parity is enabled). It indicates finish of data
transmission.
7751 Group User's Manual
Time
Next transmit/receive data
(When continuously
transferring)
MSB PAR SP ST
Functions
SERIAL I/O
7–39