Table of Contents
Advertisement
CHAPTER 1. DESCRIPTION
1.1 Performance overview .......................................................................................................... 1-3
1.2 Pin configuration ................................................................................................................... 1-4
1.3 Pin description ...................................................................................................................... 1-5
1.4 Block diagram ........................................................................................................................ 1-8
2.1 Central processing unit ....................................................................................................... 2-2
2.1.1 Accumulator (Acc) ......................................................................................................... 2-3
2.1.2 Index register X (X) ....................................................................................................... 2-3
2.1.3 Index register Y (Y) ....................................................................................................... 2-3
2.1.4 Stack pointer (S) ............................................................................................................ 2-4
2.1.5 Program counter (PC) ................................................................................................... 2-5
2.1.6 Program bank register (PG) ......................................................................................... 2-5
2.1.7 Data bank register (DT) ................................................................................................ 2-6
2.1.8 Direct page register (DPR) ........................................................................................... 2-6
2.1.9 Processor status register (PS) ..................................................................................... 2-8
2.2 Bus interface unit ............................................................................................................... 2-10
2.2.1 Overview ....................................................................................................................... 2-10
2.2.2 Functions of bus interface unit (BIU) ........................................................................ 2-12
2.2.3 Operation of bus interface unit (BIU)........................................................................ 2-15
2.3 Access space ....................................................................................................................... 2-17
2.3.1 Banks ............................................................................................................................ 2-18
2.3.2 Direct page ................................................................................................................... 2-18
2.4 Memory assignment ........................................................................................................... 2-19
2.4.1 Memory assignment in internal area ......................................................................... 2-19
2.5 Processor modes ................................................................................................................ 2-22
2.5.1 Single-chip mode ......................................................................................................... 2-23
2.5.2 Memory expansion and microprocessor modes ....................................................... 2-23
2.5.3 Setting processor modes ............................................................................................ 2-26
[Precautions when operating in single-chip mode] ............................................................ 2-28
3.1 Programmable I/O ports ...................................................................................................... 3-2
3.1.1 Direction register ............................................................................................................ 3-3
3.1.2 Port register .................................................................................................................... 3-4
3.2 I/O pins of internal peripheral devices ............................................................................ 3-8
Table of Contents
7751 Group User's Manual
Table of Contents
i
Advertisement
Table of Contents
