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(3) Example of ROM and SRAM expansion (maximum model)
Figure 17.1.29 shows a memory expansion example (maximum model) using two 32-Kbytes ROM
and two 32-Kbytes SRAM in the microprocessor mode at the low-speed running. Figure 17.1.30
shows the timing chart for this example.
Figure 17.1.31 shows a memory expansion example (maximum model) using two 32-Kbytes ROM
and two 32-Kbytes SRAM in the microprocessor mode at the high-speed running. Figure 17.1.32
shows the timing chart for this example.
M37751
CNV
SS
BYTE
A
A
X
IN
1: Use the elements of which propagation delay time is within 80 ns.
2: Use the elements of which propagation delay time is within 23 ns.
3: Use the elements of which propagation delay time is within 10.6 ns.
Fig. 17.1.29 Example of ROM and SRAM expansion (maximum model at low-speed running)
Address bus
A
–A
1
7
–
A8
A15
2
AC573
/D
–
8
8
D Q
/D
15
15
LE
ALE
A1
2
AC573
A16
D Q
A
/D
16
0
D8
LE
Data bus (odd)
Data bus (even)
D
–D
1
7
AC04
AC32
R/W
E
A
0
BHE
X
OUT
AC32
21 MHz
Circuit condition : 3 access in low-speed running
7751 Group User's Manual
M5M27C256AK-15
CE
CE
A
–A
0
14
A
–A
0
–
–
A15
A1
A15
–
–
D15
D0
D7
D
–D
0
7
D
–D
0
OE
OE
3
RD
WE
WO
APPLICATIONS
17.1 Memory expansion
M5M5256CP-70LL
1
S
AC04
A
–A
14
0
14
–
A1
A15
A1
–
D8
D15
DQ
–DQ
1
8
7
OE W
0000
16
0080
16
0880
16
(M5M27C256AK 2)
10000
16
1FFFF
16
S
A
–A
0
14
–
A15
–
D0
D7
DQ
–DQ
1
8
OE W
Memory map
SFR area
Internal
RAM area
External
ROM area
External
RAM area
(M5M5256CP 2)
17–33
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