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2.1.1 Accumulator (Acc)
Accumulators A and B are available.
(1) Accumulator A (A)
Accumulator A is the main register of the microcomputer. The transaction of data such as calculation,
data transfer, and input/output are performed mainly through accumulator A. It consists of 16 bits,
and the low-order 8 bits can also be used separately. The data length flag (m) determines whether
the register is used as a 16-bit register or as an 8-bit register. Flag m is a part of the processor status
register which is described later. When an 8-bit register is selected, only the low-order 8 bits of
accumulator A are used and the contents of the high-order 8 bits is unchanged.
(2) Accumulator B (B)
Accumulator B is a 16-bit register with the same function as accumulator A. Accumulator B can be
used instead of accumulator A. The use of accumulator B, however except for some instructions,
requires more instruction bytes and execution cycles than that of accumulator A. Accumulator B is
also controlled by the data length flag (m) just as in accumulator A.
2.1.2 Index register X (X)
Index register X consists of 16 bits and the low-order 8 bits can also be used separately. The index register
length flag (x) determines whether the register is used as a 16-bit register or as an 8-bit register. Flag x
is a part of the processor status register which is described later. When an 8-bit register is selected, only
the low-order 8 bits of index register X are used and the contents of the high-order 8 bits is unchanged.
In an addressing mode in which index register X is used as an index register, the address obtained by
adding the contents of this register to the operand's contents is accessed.
In the MVP or MVN instruction, a block transfer instruction, the contents of index register X indicate the
low-order 16 bits of the source address. The third byte of the instruction is the high-order 8 bits of the
source address.
In the RMPA instruction, a Repeat MultiPly and Accumulate instruction, the contents of index register X
indicate the low-order 16 bits of address in which multiplicands are stored.
Note: Refer to "7751 Series Software Manual" for addressing modes.
2.1.3 Index register Y (Y)
Index register Y is a 16-bit register with the same function as index register X. Just as in index register
X, the index register length flag (x) determines whether this register is used as a 16-bit register or as an
8-bit register.
In the MVP or MVN instruction, a block transfer instruction, the contents of index register Y indicate the
low-order 16 bits of the destination address. The second byte of the instruction is the high-order 8 bits of
the destination address.
In the RMPA instruction, a Repeat MultiPly and Accumulate instruction, the contents of index register Y
indicate the low-order 16 bits of address in which multipliers are stored.
CENTRAL PROCESSING UNIT (CPU)
7751 Group User's Manual
2.1 Central processing unit
2–3
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