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APPLICATIONS
17.1 Memory expansion
When using an external memory that outputs data within t
signal
Because the external memory outputs data within t
be a possibility of the tail of address colliding with the head of data. In such a case, generate the
memory read signal (OE) with delay only the leading edge of the fall of the E. (Refer to Figure
17.1.12.)
External memory
output enable signal
(Read signal)
Address output
External memory
data output
Note: Satisfy
Fig. 17.1.12 Example of causing to delay data output timing
17–16
__
E
OE
≤
t
t
pxz
(E-P1Z/P2Z)
≤
t
t
If
en
pxz
(OE)
(E-P1Z/P2Z)
from falling of E to the falling of OE.
7751 Group User's Manual
pxz(E-P1Z/P2Z)
d
t
Address
: Specifications of the M37751
(The others are the external memory's.)
+d.
en
(OE)
(= 5 ns), secure a certain time (i.e., 'd' in this diagram)
after falling of the E
pxz(E-P1Z/P2Z)
_
after falling of the E signal, there will
_
pxz
(E-P1Z/P2Z)
Address
Data
t
a
(OE)
t
en
(OE)
_
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