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SERIAL I/O
7.3 Clock synchronous serial I/O mode
7.3.4 Transmit operation
When the transmit conditions described in page 7-20 are satisfied, the following operations are automatically
performed simultaneously.
•The UARTi transmit buffer register's contents are transferred to the UARTi transmit register.
•8 transfer clocks are generated (when an internal clock is selected).
•The transmit buffer empty flag is set to "1."
•The transmit register empty flag is cleared to "0."
•The UARTi transmit interrupt request occurs, and the interrupt request bit is set to "1."
The transmit operations are described below.
Data in the UARTi transmit register is transmitted from the TxD
transfer clock.
This data is transmitted bit by bit sequentially beginning with the least significant bit.
When 1-byte data has been transmitted, the transmit register empty flag is set to "1," indicating completion
of the transmission.
Figure 7.3.4 shows the transmit operation.
In the case of an internal clock is selected, when the transmit conditions for the next data are satisfied at
completion of the transmission, the transfer clock is generated continuously. Accordingly, when performing
transmission continuously, set the next transmit data to the UARTi transmit buffer register during transmission
(when the transmit register empty flag = "0"). When the transmit conditions for the next data are not
satisfied, the transfer clock stops at "H" level.
Figures 7.3.5 shows an example of transmit timing (when selecting an internal clock).
7–24
7751 Group User's Manual
pin synchronously with the falling of the
i
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