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INTERRUPTS
4.11 Precautions when using interrupts
4.11 Precautions when using interrupts
To change the interrupt priority level select bits (bits 0 to 2 at addresses 70
are required after executing an write-instruction until completion of the interrupt priority level's change.
Accordingly, it is necessary to reserve enough time by software when changing the interrupt priority level
of which interrupt source is the same within a very short execution time consisting of a few instructions.
Figure 4.11.1 shows a program example to reserve time required for changing interrupt priority level. The
time for change depends on the interrupt priority detection timer select bits (bits 4 and 5 at address 5E
Table 4.11.1 lists the relation between the number of instructions to be inserted with program example of
Figure 4.11.1 and the interrupt priority detection time select bits.
:
LDM.B #0XH, 007XH
NOP
NOP
NOP
LDM.B #0XH, 007XH
:
Note: All instructions (other than instructions for writing to address 7X
same cycles as NOP instruction can also be inserted. Confirm the number of
instructions to be inserted by Table 4.11.1.
Fig. 4.11.1 Program example to reserve time required for changing interrupt priority level
Table 4.11.1 Relation between number of instructions to be inserted with program example of Figure
4.11.1 and interrupt priority detection time select bits
Interrupt priority detection time select bits (Note)
b5
0
0
1
1
Note: We recommend [b5 = "1", b4 = "0"].
4–26
; Write to interrupt priority level select bits
; Insert NOP instruction (Note)
;
;
; Write to interrupt priority level select bits
Interrupt priority level
detection time
b4
7 cycles of φ
0
4 cycles of φ
1
2 cycles of φ
0
Do not select.
1
7751 Group User's Manual
), 2 to 7 cycles of φ
to 7F
16
16
) which have the
16
Number of inserted
instructions
NOP instruction 4 or more
NOP instruction 2 or more
NOP instruction 1 or more
).
16
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