Functions Of Bus Interface Unit (Biu) - Renesas 7700 FAMILY User Manual

CENTRAL PROCESSING UNIT (CPU)
2.2 Bus interface unit

2.2.2 Functions of bus interface unit (BIU)

The bus interface unit (BIU) consists of four registers shown in Figure 2.2.2. Table 2.2.1 lists the functions
of each register.
Fig. 2.2.2 Register structure of bus interface unit (BIU)
Table 2.2.1 Functions of each register
Name
Program address register
Instruction queue buffer
Data address register
Data buffer
2–12
b23
PA
b7
Q
0
Q
1
Q
2
b23
DA
b15
DB DB
L
H
Indicates the storage address for the instruction which is next taken into the
instruction queue buffer.
Temporarily stores the instruction which has been taken in.
Indicates the address for the data which is next read from or written to.
Temporarily stores the data which is read from the memory•I/O device by the
BIU or which is written to the memory•I/O device by the CPU.
7751 Group User's Manual
b0
Program address register
b0
Instruction queue buffer
b0
Data address register
b0
Data buffer
Functions