APPENDIX
Appendix 9. Q & A
Q
In the case selecting the CTS function in UART (clock asynchronous serial I/O) mode, when the
transmitting side check the CTS input level ?
A
It is check near the middle of the stop bit (when two stop bits are selected, the second stop bit).
Transmit data
Transmit data
20–76
____
____
Input level to CTS
D
6
. . . . . . . . . . . . . .
n
D
6
. . . . . . . . . . . . . .
n
n: 1-bit length
7751 Group User's Manual
pin is checked near here.
i
D
SP
7
. . . . . . . . . . . . . .
n
n/2
n/2
I
nput level to CTS
pin is checked near here.
i
D
SP
SP
7
n
n
n/2
Serial I/O (UART mode)
. . . . . . . . . . . . . .
n/2