Renesas 7700 FAMILY User Manual page 49

INPUT/OUTPUT PINS
3.1 Programmable I/O ports
This chapter describes the programmable I/O ports in the single-chip mode. For P0 to P4, which change
their functions according to the processor mode, refer also to the section "2.5 Processor modes" and
"Chapter 12. CONNECTION WITH EXTERNAL DEVICES."
3.1 Programmable I/O ports
The 7751 Group has 68 programmable I/O ports, P0 to P8.
The programmable I/O ports have direction registers and port registers in the SFR area. Figure 3.1.1 shows
the memory map of direction registers and port registers.
P4 and P5 to P8 also function as the I/O pins of the internal peripheral devices. For the functions, refer
2
to the section "3.2 I/O pins of internal peripheral devices" and relevant sections of each internal peripheral
devices.
Addresses
Fig. 3.1.1 Memory map of direction registers and port registers
3–2
Port P0 register
2
16
Port P1 register
3
16
Port P0 direction register
4
16
Port P1 direction register
5
16
Port P2 register
6
16
Port P3 register
7
16
Port P2 direction register
8
16
Port P3 direction register
9
16
Port P4 register
A
16
Port P5 register
B
16
Port P4 direction register
C
16
Port P5 direction register
D
16
Port P6 register
E
16
Port P7 register
F
16
Port P6 direction register
10
16
Port P7 direction register
11
16
Port P8 register
12
16
13
16
Port P8 direction register
14
16
7751 Group User's Manual