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DESCRIPTION
1.3 Pin description
Table 1.3.2 Pin description (2)
Pin
Name
P0
–P0
I/O port P0
0
7
A
–A
0
7
P1
–P1
I/O port P1
0
7
A
/D
–
8
8
A
/D
15
15
P2
–P2
I/O port P2
0
7
A
/D
–
16
0
A
/D
23
7
P3
–P3
I/O port P3
0
3
__
R/W,
____
BHE,
ALE,
_____
HLDA
1–6
Input/Output
I/O
[Single-chip mode]
Port P0 is an 8-bit CMOS I/O port. This port has an
I/O direction register and each pin can be programmed
for input or output.
[Memory expansion mode] [Microprocessor mode]
Output
Low-order 8 bits (A
[Single-chip mode]
I/O
Port P1 is an 8-bit I/O port with the same function as
P0.
[Memory expansion mode] [Microprocessor mode]
External bus width = 8 bits (When the BYTE pin is
"H" level)
Middle-order 8 bits (A
External bus width = 16 bits (When the BYTE pin is
"L" level)
Data (D
order 8 bits (A
with the time sharing system.
[Single-chip mode]
I/O
Port P2 is an 8-bit I/O port with the same function as P0.
[Memory expansion mode] [Microprocessor mode]
Data (D
order 8 bits (A
with the time sharing system.
[Single-chip mode]
I/O
Port P3 is a 4-bit I/O port with the same function as P0.
[Memory expansion mode] [Microprocessor mode]
Output
P3
–P3
0
signals.
__
R/W
The Read/Write signal indicates the data bus state.
The state is read while this signal is "H" level, and
write while this is "L" level.
____
BHE
"L" level is output when an odd-numbered address is
accessed.
ALE
This is used to obtain only the address from address
and data multiplex signals.
_____
HLDA
This is the signal to externally indicate the state when
the microcomputer is in Hold state.
"L" level is output during Hold state.
7751 Group User's Manual
Functions
–A
) of the address are output.
0
7
–A
) of the address are output.
8
15
to D
) input/output and output of the middle-
8
15
–A
) of the address are performed
8
15
to D
) input/output and output of the high-
0
7
–A
) of the address are performed
16
23
respectively output R/W, BHE, ALE, and HLDA
3
__ ____
_____
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